net: mvpp2: always compare hw-version vs MVPP21

Currently we have PP2v1 and PP2v2 hw-versions, with some different
handlers depending upon condition hw_version = MVPP21/MVPP22.
In a future there will be also PP2v3. Let's use now the generic
"if equal/notEqual MVPP21" for all cases instead of "if MVPP22".

This patch does not change any functionality.
It is not intended to introduce PP2v3.
It just modifies MVPP21/MVPP22 check-condition
bringing it to generic and unified form correct for new-code
introducing and PP2v3 net-next generation.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 57fe5f006803ce7b31e9219287f8f69c70929f77..2ad57f71e78bb9bbb176e009d8422c836a24a173 100644 (file)
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -319,7 +319,7 @@ static int mvpp2_get_nrxqs(struct mvpp2 *priv)
 {
        unsigned int nrxqs;
 
-       if (priv->hw_version == MVPP22 && queue_mode == MVPP2_QDIST_SINGLE_MODE)
+       if (priv->hw_version != MVPP21 && queue_mode == MVPP2_QDIST_SINGLE_MODE)
                return 1;
 
        /* According to the PPv2.2 datasheet and our experiments on
@@ -446,7 +446,7 @@ static void mvpp2_bm_bufs_get_addrs(struct device *dev, struct mvpp2 *priv,
                                      MVPP2_BM_PHY_ALLOC_REG(bm_pool->id));
        *phys_addr = mvpp2_thread_read(priv, thread, MVPP2_BM_VIRT_ALLOC_REG);
 
-       if (priv->hw_version == MVPP22) {
+       if (priv->hw_version != MVPP21) {
                u32 val;
                u32 dma_addr_highbits, phys_addr_highbits;
 
@@ -742,7 +742,7 @@ static inline void mvpp2_bm_pool_put(struct mvpp2_port *port, int pool,
        if (test_bit(thread, &port->priv->lock_map))
                spin_lock_irqsave(&port->bm_lock[thread], flags);
 
-       if (port->priv->hw_version == MVPP22) {
+       if (port->priv->hw_version != MVPP21) {
                u32 val = 0;
 
                if (sizeof(dma_addr_t) == 8)
@@ -1172,7 +1172,7 @@ mvpp2_shared_interrupt_mask_unmask(struct mvpp2_port *port, bool mask)
        u32 val;
        int i;
 
-       if (port->priv->hw_version != MVPP22)
+       if (port->priv->hw_version == MVPP21)
                return;
 
        if (mask)
@@ -1199,7 +1199,7 @@ static bool mvpp2_port_supports_xlg(struct mvpp2_port *port)
 
 static bool mvpp2_port_supports_rgmii(struct mvpp2_port *port)
 {
-       return !(port->priv->hw_version == MVPP22 && port->gop_id == 0);
+       return !(port->priv->hw_version != MVPP21 && port->gop_id == 0);
 }
 
 /* Port configuration routines */
@@ -1817,7 +1817,7 @@ static void mvpp2_mac_reset_assert(struct mvpp2_port *port)
              MVPP2_GMAC_PORT_RESET_MASK;
        writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
 
-       if (port->priv->hw_version == MVPP22 && port->gop_id == 0) {
+       if (port->priv->hw_version != MVPP21 && port->gop_id == 0) {
                val = readl(port->base + MVPP22_XLG_CTRL0_REG) &
                      ~MVPP22_XLG_CTRL0_MAC_RESET_DIS;
                writel(val, port->base + MVPP22_XLG_CTRL0_REG);
@@ -1830,7 +1830,7 @@ static void mvpp22_pcs_reset_assert(struct mvpp2_port *port)
        void __iomem *mpcs, *xpcs;
        u32 val;
 
-       if (port->priv->hw_version != MVPP22 || port->gop_id != 0)
+       if (port->priv->hw_version == MVPP21 || port->gop_id != 0)
                return;
 
        mpcs = priv->iface_base + MVPP22_MPCS_BASE(port->gop_id);
@@ -1851,7 +1851,7 @@ static void mvpp22_pcs_reset_deassert(struct mvpp2_port *port)
        void __iomem *mpcs, *xpcs;
        u32 val;
 
-       if (port->priv->hw_version != MVPP22 || port->gop_id != 0)
+       if (port->priv->hw_version == MVPP21 || port->gop_id != 0)
                return;
 
        mpcs = priv->iface_base + MVPP22_MPCS_BASE(port->gop_id);
@@ -4196,7 +4196,7 @@ static void mvpp2_start_dev(struct mvpp2_port *port)
        /* Enable interrupts on all threads */
        mvpp2_interrupts_enable(port);
 
-       if (port->priv->hw_version == MVPP22)
+       if (port->priv->hw_version != MVPP21)
                mvpp22_mode_reconfigure(port);
 
        if (port->phylink) {
@@ -4412,7 +4412,7 @@ static int mvpp2_open(struct net_device *dev)
                valid = true;
        }
 
-       if (priv->hw_version == MVPP22 && port->port_irq) {
+       if (priv->hw_version != MVPP21 && port->port_irq) {
                err = request_irq(port->port_irq, mvpp2_port_isr, 0,
                                  dev->name, port);
                if (err) {
@@ -6060,7 +6060,7 @@ static int mvpp2__mac_prepare(struct phylink_config *config, unsigned int mode,
                             MVPP2_GMAC_PORT_RESET_MASK,
                             MVPP2_GMAC_PORT_RESET_MASK);
 
-               if (port->priv->hw_version == MVPP22) {
+               if (port->priv->hw_version != MVPP21) {
                        mvpp22_gop_mask_irq(port);
 
                        phy_power_off(port->comphy);
@@ -6114,7 +6114,7 @@ static int mvpp2_mac_finish(struct phylink_config *config, unsigned int mode,
 {
        struct mvpp2_port *port = mvpp2_phylink_to_port(config);
 
-       if (port->priv->hw_version == MVPP22 &&
+       if (port->priv->hw_version != MVPP21 &&
            port->phy_interface != interface) {
                port->phy_interface = interface;
 
@@ -6794,7 +6794,7 @@ static int mvpp2_init(struct platform_device *pdev, struct mvpp2 *priv)
        if (dram_target_info)
                mvpp2_conf_mbus_windows(dram_target_info, priv);
 
-       if (priv->hw_version == MVPP22)
+       if (priv->hw_version != MVPP21)
                mvpp2_axi_init(priv);
 
        /* Disable HW PHY polling */
@@ -6938,7 +6938,7 @@ static int mvpp2_probe(struct platform_device *pdev)
                        dev_warn(&pdev->dev, "Fail to alloc CM3 SRAM\n");
        }
 
-       if (priv->hw_version == MVPP22 && dev_of_node(&pdev->dev)) {
+       if (priv->hw_version != MVPP21 && dev_of_node(&pdev->dev)) {
                priv->sysctrl_base =
                        syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
                                                        "marvell,system-controller");
@@ -6951,7 +6951,7 @@ static int mvpp2_probe(struct platform_device *pdev)
                        priv->sysctrl_base = NULL;
        }
 
-       if (priv->hw_version == MVPP22 &&
+       if (priv->hw_version != MVPP21 &&
            mvpp2_get_nrxqs(priv) * 2 <= MVPP2_BM_MAX_POOLS)
                priv->percpu_pools = 1;
 
@@ -6996,7 +6996,7 @@ static int mvpp2_probe(struct platform_device *pdev)
                if (err < 0)
                        goto err_pp_clk;
 
-               if (priv->hw_version == MVPP22) {
+               if (priv->hw_version != MVPP21) {
                        priv->mg_clk = devm_clk_get(&pdev->dev, "mg_clk");
                        if (IS_ERR(priv->mg_clk)) {
                                err = PTR_ERR(priv->mg_clk);
@@ -7037,7 +7037,7 @@ static int mvpp2_probe(struct platform_device *pdev)
                return -EINVAL;
        }
 
-       if (priv->hw_version == MVPP22) {
+       if (priv->hw_version != MVPP21) {
                err = dma_set_mask(&pdev->dev, MVPP2_DESC_DMA_MASK);
                if (err)
                        goto err_axi_clk;
@@ -7112,10 +7112,10 @@ err_axi_clk:
        clk_disable_unprepare(priv->axi_clk);
 
 err_mg_core_clk:
-       if (priv->hw_version == MVPP22)
+       if (priv->hw_version != MVPP21)
                clk_disable_unprepare(priv->mg_core_clk);
 err_mg_clk:
-       if (priv->hw_version == MVPP22)
+       if (priv->hw_version != MVPP21)
                clk_disable_unprepare(priv->mg_clk);
 err_gop_clk:
        clk_disable_unprepare(priv->gop_clk);