dt-bindings: phy: cadence-sierra: drop assigned-clocks
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 4 Apr 2023 19:01:11 +0000 (21:01 +0200)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Apr 2023 16:19:36 +0000 (21:49 +0530)
The meta schema from DT schema already defines assigned-clocks, so there
is no need for device schema to mention it at all.  There are also no
benefits of having it here and a board could actually need more of clock
assignments than the schema allows.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230404190115.546973-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml

index c3d1fa102798c49edadaf6c0f7caecebdf0c7d72..37f028f7a09554bd1580fa1390e27f46b5753fac 100644 (file)
@@ -61,14 +61,6 @@ properties:
       - const: pll0_refclk
       - const: pll1_refclk
 
-  assigned-clocks:
-    minItems: 1
-    maxItems: 2
-
-  assigned-clock-parents:
-    minItems: 1
-    maxItems: 2
-
   cdns,autoconf:
     type: boolean
     description: