arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores

Enable cpuidle (core shutdown) support for the CA57 cores on R-Car M3-N.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309171112.21086-1-geert+renesas@glider.be

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index f7468822e81e41d6386bb8efa3b51cb5d617816c..d82dd4e67b62b85c2c213acdc33b320705857138 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -111,6 +111,7 @@
                        power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
                        next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        #cooling-cells = <2>;
                        dynamic-power-coefficient = <854>;
                        clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
@@ -124,6 +125,7 @@
                        power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
                        next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                        clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
                        operating-points-v2 = <&cluster0_opp>;
                };
@@ -134,6 +136,19 @@
                        cache-unified;
                        cache-level = <2>;
                };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <400>;
+                               exit-latency-us = <500>;
+                               min-residency-us = <4000>;
+                       };
+               };
        };
 
        extal_clk: extal {