drm/amd/pp: Add stable Pstate clk display support in debugfs
authorRex Zhu <Rex.Zhu@amd.com>
Mon, 8 Jan 2018 05:59:05 +0000 (13:59 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Feb 2018 19:17:53 +0000 (14:17 -0500)
The additional output are: PSTATE_SCLK and PSTATE_MCLK value
in MHz as:

300 MHz (PSTATE_SCLK)
300 MHz (PSTATE_MCLK)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
drivers/gpu/drm/amd/include/kgd_pp_interface.h
drivers/gpu/drm/amd/powerplay/amd_powerplay.c

index 662edca5722d81bb340a0e46e8294db3e61e5e39..ed9012a903b0d1bfdd19c9cd24881b88d99ca56e 100644 (file)
@@ -1591,6 +1591,10 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a
                seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
        if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value, &size))
                seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
+       if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, (void *)&value, &size))
+               seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100);
+       if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, (void *)&value, &size))
+               seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100);
        if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value, &size))
                seq_printf(m, "\t%u mV (VDDGFX)\n", value);
        if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value, &size))
index 174618004f2ece2d4bceca1f0333135f88ffec4e..68f2c8484187200bd25cb2a16f7a1acaac8475ed 100644 (file)
@@ -122,6 +122,8 @@ enum amd_pp_sensors {
        AMDGPU_PP_SENSOR_VCE_POWER,
        AMDGPU_PP_SENSOR_UVD_POWER,
        AMDGPU_PP_SENSOR_GPU_POWER,
+       AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK,
+       AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK,
 };
 
 enum amd_pp_task {
index 5e2252127fe5675ca79f350545d858a879edd5e9..d9cb424ff7e96242bb56ca3f8357352e891acfa6 100644 (file)
@@ -992,22 +992,27 @@ static int pp_dpm_read_sensor(void *handle, int idx,
        int ret = 0;
 
        ret = pp_check(pp_handle);
-
        if (ret)
                return ret;
 
+       if (value == NULL)
+               return -EINVAL;
+
        hwmgr = pp_handle->hwmgr;
 
-       if (hwmgr->hwmgr_func->read_sensor == NULL) {
-               pr_info("%s was not implemented.\n", __func__);
+       switch (idx) {
+       case AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK:
+               *((uint32_t *)value) = hwmgr->pstate_sclk;
                return 0;
+       case AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK:
+               *((uint32_t *)value) = hwmgr->pstate_mclk;
+               return 0;
+       default:
+               mutex_lock(&pp_handle->pp_lock);
+               ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
+               mutex_unlock(&pp_handle->pp_lock);
+               return ret;
        }
-
-       mutex_lock(&pp_handle->pp_lock);
-       ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
-       mutex_unlock(&pp_handle->pp_lock);
-
-       return ret;
 }
 
 static struct amd_vce_state*