drm/amdgpu/gfx9: Raven has two MECs
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 7 Jun 2017 15:07:48 +0000 (11:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 7 Jun 2017 19:43:38 +0000 (15:43 -0400)
This was missed when Andres' queue patches were rebased.

Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 3ea0e716360d36a1274ac7d42164e5d01f9a1fb2..e0193e4cb8d4746566fc8ca5ef7c377c374d557e 100644 (file)
@@ -872,6 +872,7 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
 
        switch (adev->asic_type) {
        case CHIP_VEGA10:
+       case CHIP_RAVEN:
                adev->gfx.mec.num_mec = 2;
                break;
        default: