DPIA_BW_ALLOC_CAPS_CHANGED
};
+/* enum dmub_memory_access_type - memory access method */
+enum dmub_memory_access_type {
+ DMUB_MEMORY_ACCESS_DEFAULT,
+ DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
+ DMUB_MEMORY_ACCESS_DMA
+};
+
/**
* struct dmub_region - dmub hw memory region
* @base: base address for region, must be 256 byte aligned
bool dpia_hpd_int_enable_supported;
bool disable_clock_gate;
bool disallow_dispclk_dppclk_ds;
+ enum dmub_memory_access_type mem_access_type;
};
/**
* DMCUB when backdoor loading if the write from x86 hasn't been
* flushed yet. This only occurs in backdoor loading.
*/
- dmub_flush_buffer_mem(inst_fb);
+ if (params->mem_access_type == DMUB_MEMORY_ACCESS_CPU)
+ dmub_flush_buffer_mem(inst_fb);
if (params->fw_in_system_memory && dmub->hw_funcs.backdoor_load_zfb_mode)
dmub->hw_funcs.backdoor_load_zfb_mode(dmub, &cw0, &cw1);