usb: typec: tcpm/tcpci_maxim: use GENMASK() for TCPC_VENDOR_CC_CTRL3 register
authorAndré Draszik <andre.draszik@linaro.org>
Wed, 10 Jul 2024 10:36:19 +0000 (11:36 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 7 Aug 2024 10:49:30 +0000 (12:49 +0200)
Convert register TCPC_VENDOR_CC_CTRL3 to using GENMASK() so as to keep
using a similar approach throughout the code base and make it arguably
easier to read.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20240710-tcpc-cleanup-v1-12-0ec1f41f4263@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/typec/tcpm/maxim_contaminant.c
drivers/usb/typec/tcpm/tcpci_maxim.h

index f7acaa42329f750502c9089398e72431b1e2d942..cf9887de96c930662c04efba5d6cdf076786230c 100644 (file)
@@ -283,10 +283,11 @@ static int max_contaminant_enable_dry_detection(struct max_tcpci_chip *chip)
        u8 temp;
        int ret;
 
-       ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL3, CCWTRDEB_MASK | CCWTRSEL_MASK
-                                   | WTRCYCLE_MASK, CCWTRDEB_1MS << CCWTRDEB_SHIFT |
-                                   CCWTRSEL_1V << CCWTRSEL_SHIFT | WTRCYCLE_4_8_S <<
-                                   WTRCYCLE_SHIFT);
+       ret = regmap_update_bits(regmap, TCPC_VENDOR_CC_CTRL3,
+                                CCWTRDEB | CCWTRSEL | WTRCYCLE,
+                                FIELD_PREP(CCWTRDEB, CCWTRDEB_1MS)
+                                | FIELD_PREP(CCWTRSEL, CCWTRSEL_1V)
+                                | FIELD_PREP(WTRCYCLE, WTRCYCLE_4_8_S));
        if (ret < 0)
                return ret;
 
index 92c9a628ebe181eb8f720ef76c0dff132f5146a6..34076069444f0c9dce4a69b641b31b734f4b3616 100644 (file)
 #define UA_80_SRC                               3
 
 #define TCPC_VENDOR_CC_CTRL3                    0x8e
-#define CCWTRDEB_MASK                           GENMASK(7, 6)
-#define CCWTRDEB_SHIFT                          6
+#define CCWTRDEB                                GENMASK(7, 6)
 #define CCWTRDEB_1MS                            1
-#define CCWTRSEL_MASK                           GENMASK(5, 3)
-#define CCWTRSEL_SHIFT                          3
+#define CCWTRSEL                                GENMASK(5, 3)
 #define CCWTRSEL_1V                             0x4
 #define CCLADDERDIS                             BIT(2)
-#define WTRCYCLE_MASK                           BIT(0)
-#define WTRCYCLE_SHIFT                          0
+#define WTRCYCLE                                GENMASK(0, 0)
 #define WTRCYCLE_2_4_S                          0
 #define WTRCYCLE_4_8_S                          1