drm/i915/dp_mst: Enable LT fallback between UHBR/non-UHBR link rates
authorImre Deak <imre.deak@intel.com>
Mon, 22 Jul 2024 16:55:03 +0000 (19:55 +0300)
committerImre Deak <imre.deak@intel.com>
Wed, 31 Jul 2024 15:45:59 +0000 (18:45 +0300)
Enable switching between UHBR and non-UHBR link rates on MST links when
reducing the link parameters after an LT failure.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240722165503.2084999-15-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp_link_training.c

index 86d58a4c8453f51bcc10084fa83174e4ba9cc5b7..9c87382951062bb2dc5b92fcf83af5ba1fdf85e4 100644 (file)
@@ -1188,11 +1188,6 @@ static bool reduce_link_params_in_bw_order(struct intel_dp *intel_dp,
                     intel_dp->link.force_lane_count != lane_count))
                        continue;
 
-               /* TODO: Make switching from UHBR to non-UHBR rates work. */
-               if (drm_dp_is_uhbr_rate(crtc_state->port_clock) !=
-                   drm_dp_is_uhbr_rate(link_rate))
-                       continue;
-
                break;
        }