net: pcs: xpcs: correctly place DW_VR_MII_DIG_CTRL1_2G5_EN

Place DW_VR_MII_DIG_CTRL1_2G5_EN with the other DW_VR_MII_DIG_CTRL1
definitions rather than in the middle of a register list.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h
index b80b956ec286512a72eb895b9572ee9b99f7b60e..9a22eed4404d1ce966fc3e657bf848852385f17f 100644 (file)
--- a/drivers/net/pcs/pcs-xpcs.h
+++ b/drivers/net/pcs/pcs-xpcs.h
@@ -60,8 +60,6 @@
 #define DW_VR_MII_DIG_CTRL1            0x8000
 #define DW_VR_MII_AN_CTRL              0x8001
 #define DW_VR_MII_AN_INTR_STS          0x8002
-/* Enable 2.5G Mode */
-#define DW_VR_MII_DIG_CTRL1_2G5_EN     BIT(2)
 /* EEE Mode Control Register */
 #define DW_VR_MII_EEE_MCTRL0           0x8006
 #define DW_VR_MII_EEE_MCTRL1           0x800b
@@ -69,6 +67,7 @@
 
 /* VR_MII_DIG_CTRL1 */
 #define DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW                BIT(9)
+#define DW_VR_MII_DIG_CTRL1_2G5_EN             BIT(2)
 #define DW_VR_MII_DIG_CTRL1_PHY_MODE_CTRL      BIT(0)
 
 /* VR_MII_DIG_CTRL2 */