RISC-V: KVM: add KVM_CAP_RISCV_MP_STATE_RESET
authorRadim Krčmář <rkrcmar@ventanamicro.com>
Thu, 15 May 2025 14:37:25 +0000 (16:37 +0200)
committerAnup Patel <anup@brainfault.org>
Wed, 21 May 2025 04:04:57 +0000 (09:34 +0530)
Add a toggleable VM capability to reset the VCPU from userspace by
setting MP_STATE_INIT_RECEIVED through IOCTL.

Reset through a mp_state to avoid adding a new IOCTL.
Do not reset on a transition from STOPPED to RUNNABLE, because it's
better to avoid side effects that would complicate userspace adoption.
The MP_STATE_INIT_RECEIVED is not a permanent mp_state -- IOCTL resets
the VCPU while preserving the original mp_state -- because we wouldn't
gain much from having a new state it in the rest of KVM, but it's a very
non-standard use of the IOCTL.

Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250515143723.2450630-5-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Documentation/virt/kvm/api.rst
arch/riscv/include/asm/kvm_host.h
arch/riscv/include/asm/kvm_vcpu_sbi.h
arch/riscv/kvm/vcpu.c
arch/riscv/kvm/vcpu_sbi.c
arch/riscv/kvm/vm.c
include/uapi/linux/kvm.h

index 47c7c3f92314e5ac488610b839fe55700cff184b..e107694fb41fe36e78a96175b60439c00d543d11 100644 (file)
@@ -8496,6 +8496,17 @@ aforementioned registers before the first KVM_RUN. These registers are VM
 scoped, meaning that the same set of values are presented on all vCPUs in a
 given VM.
 
+7.43 KVM_CAP_RISCV_MP_STATE_RESET
+---------------------------------
+
+:Architectures: riscv
+:Type: VM
+:Parameters: None
+:Returns: 0 on success, -EINVAL if arg[0] is not zero
+
+When this capability is enabled, KVM resets the VCPU when setting
+MP_STATE_INIT_RECEIVED through IOCTL.  The original MP_STATE is preserved.
+
 8. Other capabilities.
 ======================
 
index f673ebfdadf393deea9bdde1a5e0527cc65f6777..85cfebc32e4cf58a818c37c4dc4ac1c47eaf0506 100644 (file)
@@ -119,6 +119,9 @@ struct kvm_arch {
 
        /* AIA Guest/VM context */
        struct kvm_aia aia;
+
+       /* KVM_CAP_RISCV_MP_STATE_RESET */
+       bool mp_state_reset;
 };
 
 struct kvm_cpu_trap {
index da28235939d12a5e3b18a0bb47137a50e6201d20..439ab2b3534f8ed1f5e0578b96e51ecda140fb58 100644 (file)
@@ -57,6 +57,7 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,
                                     u32 type, u64 flags);
 void kvm_riscv_vcpu_sbi_request_reset(struct kvm_vcpu *vcpu,
                                      unsigned long pc, unsigned long a1);
+void kvm_riscv_vcpu_sbi_load_reset_state(struct kvm_vcpu *vcpu);
 int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
 int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu,
                                   const struct kvm_one_reg *reg);
index a7188e007db9291966bc4a113c72d0b0c583a22f..e0a01af426ff2a85888da456b39f54e557039647 100644 (file)
@@ -51,11 +51,11 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
                       sizeof(kvm_vcpu_stats_desc),
 };
 
-static void kvm_riscv_vcpu_context_reset(struct kvm_vcpu *vcpu)
+static void kvm_riscv_vcpu_context_reset(struct kvm_vcpu *vcpu,
+                                        bool kvm_sbi_reset)
 {
        struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
        struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
-       struct kvm_vcpu_reset_state *reset_state = &vcpu->arch.reset_state;
        void *vector_datap = cntx->vector.datap;
 
        memset(cntx, 0, sizeof(*cntx));
@@ -65,13 +65,8 @@ static void kvm_riscv_vcpu_context_reset(struct kvm_vcpu *vcpu)
        /* Restore datap as it's not a part of the guest context. */
        cntx->vector.datap = vector_datap;
 
-       /* Load SBI reset values */
-       cntx->a0 = vcpu->vcpu_id;
-
-       spin_lock(&reset_state->lock);
-       cntx->sepc = reset_state->pc;
-       cntx->a1 = reset_state->a1;
-       spin_unlock(&reset_state->lock);
+       if (kvm_sbi_reset)
+               kvm_riscv_vcpu_sbi_load_reset_state(vcpu);
 
        /* Setup reset state of shadow SSTATUS and HSTATUS CSRs */
        cntx->sstatus = SR_SPP | SR_SPIE;
@@ -81,7 +76,7 @@ static void kvm_riscv_vcpu_context_reset(struct kvm_vcpu *vcpu)
        cntx->hstatus |= HSTATUS_SPV;
 }
 
-static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
+static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu, bool kvm_sbi_reset)
 {
        bool loaded;
 
@@ -97,7 +92,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 
        vcpu->arch.last_exit_cpu = -1;
 
-       kvm_riscv_vcpu_context_reset(vcpu);
+       kvm_riscv_vcpu_context_reset(vcpu, kvm_sbi_reset);
 
        kvm_riscv_vcpu_fp_reset(vcpu);
 
@@ -174,7 +169,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
        kvm_riscv_vcpu_sbi_init(vcpu);
 
        /* Reset VCPU */
-       kvm_riscv_reset_vcpu(vcpu);
+       kvm_riscv_reset_vcpu(vcpu, false);
 
        return 0;
 }
@@ -523,6 +518,12 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
        case KVM_MP_STATE_STOPPED:
                __kvm_riscv_vcpu_power_off(vcpu);
                break;
+       case KVM_MP_STATE_INIT_RECEIVED:
+               if (vcpu->kvm->arch.mp_state_reset)
+                       kvm_riscv_reset_vcpu(vcpu, false);
+               else
+                       ret = -EINVAL;
+               break;
        default:
                ret = -EINVAL;
        }
@@ -711,7 +712,7 @@ static void kvm_riscv_check_vcpu_requests(struct kvm_vcpu *vcpu)
                }
 
                if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu))
-                       kvm_riscv_reset_vcpu(vcpu);
+                       kvm_riscv_reset_vcpu(vcpu, true);
 
                if (kvm_check_request(KVM_REQ_UPDATE_HGATP, vcpu))
                        kvm_riscv_gstage_update_hgatp(vcpu);
index 0afef0bb261d848ff0e55abc16f910c7ee950a1b..31fd3cc98d667e257fe703efaefef9e5d43bb4be 100644 (file)
@@ -167,6 +167,23 @@ void kvm_riscv_vcpu_sbi_request_reset(struct kvm_vcpu *vcpu,
        kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
 }
 
+void kvm_riscv_vcpu_sbi_load_reset_state(struct kvm_vcpu *vcpu)
+{
+       struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+       struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
+       struct kvm_vcpu_reset_state *reset_state = &vcpu->arch.reset_state;
+
+       cntx->a0 = vcpu->vcpu_id;
+
+       spin_lock(&vcpu->arch.reset_state.lock);
+       cntx->sepc = reset_state->pc;
+       cntx->a1 = reset_state->a1;
+       spin_unlock(&vcpu->arch.reset_state.lock);
+
+       cntx->sstatus &= ~SR_SIE;
+       csr->vsatp = 0;
+}
+
 int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
 {
        struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
index 7396b8654f454bd3ce49e0ab403d672ad0227d4b..b27ec8f966978050efba5a74639641d46b18e54e 100644 (file)
@@ -209,6 +209,19 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
        return r;
 }
 
+int kvm_vm_ioctl_enable_cap(struct kvm *kvm, struct kvm_enable_cap *cap)
+{
+       switch (cap->cap) {
+       case KVM_CAP_RISCV_MP_STATE_RESET:
+               if (cap->flags)
+                       return -EINVAL;
+               kvm->arch.mp_state_reset = true;
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
 int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
 {
        return -EINVAL;
index b6ae8ad8934b52c7e779cd2e84b8330eb1de68bc..454b7d4a0448193eaf432045843934ddabe7136d 100644 (file)
@@ -930,6 +930,7 @@ struct kvm_enable_cap {
 #define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
 #define KVM_CAP_X86_GUEST_MODE 238
 #define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
+#define KVM_CAP_RISCV_MP_STATE_RESET 240
 
 struct kvm_irq_routing_irqchip {
        __u32 irqchip;