drm/amdgpu: change non-dcc buffer copy configuration
authorFrank Min <Frank.Min@amd.com>
Fri, 2 Aug 2024 03:15:11 +0000 (11:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Aug 2024 15:11:02 +0000 (11:11 -0400)
Without setting cpv bit and 7th ib dw, non-dcc buffer copy will have
random corruption

So set the cpv bit and clear the 7th ib dw for copy non-dcc buffers

Signed-off-by: Frank Min <Frank.Min@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

index 62ef4a737a56e3e8fb04b45d1b513ca5776aec41..e2918318600bb28627d28d19bea3239bd9016945 100644 (file)
@@ -1688,8 +1688,7 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib,
        ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) |
                SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |
                SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags & AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0) |
-               SDMA_PKT_COPY_LINEAR_HEADER_CPV((copy_flags &
-                       (AMDGPU_COPY_FLAGS_READ_DECOMPRESSED | AMDGPU_COPY_FLAGS_WRITE_COMPRESSED)) ? 1 : 0);
+               SDMA_PKT_COPY_LINEAR_HEADER_CPV(1);
 
        ib->ptr[ib->length_dw++] = byte_count - 1;
        ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
@@ -1703,6 +1702,8 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib,
                        ((copy_flags & AMDGPU_COPY_FLAGS_READ_DECOMPRESSED) ? SDMA_DCC_READ_CM(2) : 0) |
                        ((copy_flags & AMDGPU_COPY_FLAGS_WRITE_COMPRESSED) ? SDMA_DCC_WRITE_CM(1) : 0) |
                        SDMA_DCC_MAX_COM(max_com) | SDMA_DCC_MAX_UCOM(1);
+       else
+               ib->ptr[ib->length_dw++] = 0;
 }
 
 /**