wifi: rtw89: 8922a: implement AP mode related reg for BE generation
authorChih-Kang Chang <gary.chang@realtek.com>
Fri, 9 Feb 2024 06:52:27 +0000 (14:52 +0800)
committerKalle Valo <kvalo@kernel.org>
Mon, 12 Feb 2024 15:39:14 +0000 (17:39 +0200)
Modify reg for BE generation when AP stop, otherwise have warning
messages "Polling beacon packet empty fail".

Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240209065229.34515-10-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/mac_be.c
drivers/net/wireless/realtek/rtw89/reg.h

index 462c4b03c76ba1fac4f609849efd6d37c6fe7f9e..0e451245a65a560dcab6e802ef01f73d59326386 100644 (file)
@@ -958,6 +958,9 @@ struct rtw89_port_reg {
        u32 mbssid;
        u32 mbssid_drop;
        u32 tsf_sync;
+       u32 ptcl_dbg;
+       u32 ptcl_dbg_info;
+       u32 bcn_drop_all;
        u32 hiq_win[RTW89_PORT_NUM];
 };
 
index 8a1d3e6e81a9fafb4d2d62de5ed7796bb95029ec..9e9a05cc49de9d9c7cd3380cad13d270bf6961dd 100644 (file)
@@ -4037,6 +4037,9 @@ static const struct rtw89_port_reg rtw89_port_base_ax = {
        .mbssid = R_AX_MBSSID_CTRL,
        .mbssid_drop = R_AX_MBSSID_DROP_0,
        .tsf_sync = R_AX_PORT0_TSF_SYNC,
+       .ptcl_dbg = R_AX_PTCL_DBG,
+       .ptcl_dbg_info = R_AX_PTCL_DBG_INFO,
+       .bcn_drop_all = R_AX_BCN_DROP_ALL0,
        .hiq_win = {R_AX_P0MB_HGQ_WINDOW_CFG_0, R_AX_PORT_HGQ_WINDOW_CFG,
                    R_AX_PORT_HGQ_WINDOW_CFG + 1, R_AX_PORT_HGQ_WINDOW_CFG + 2,
                    R_AX_PORT_HGQ_WINDOW_CFG + 3},
@@ -4045,13 +4048,15 @@ static const struct rtw89_port_reg rtw89_port_base_ax = {
 static void rtw89_mac_check_packet_ctrl(struct rtw89_dev *rtwdev,
                                        struct rtw89_vif *rtwvif, u8 type)
 {
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+       const struct rtw89_port_reg *p = mac->port_base;
        u8 mask = B_AX_PTCL_DBG_INFO_MASK_BY_PORT(rtwvif->port);
        u32 reg_info, reg_ctrl;
        u32 val;
        int ret;
 
-       reg_info = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_DBG_INFO, rtwvif->mac_idx);
-       reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_DBG, rtwvif->mac_idx);
+       reg_info = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg_info, rtwvif->mac_idx);
+       reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg, rtwvif->mac_idx);
 
        rtw89_write32_mask(rtwdev, reg_ctrl, B_AX_PTCL_DBG_SEL_MASK, type);
        rtw89_write32_set(rtwdev, reg_ctrl, B_AX_PTCL_DBG_EN);
@@ -4068,7 +4073,7 @@ static void rtw89_mac_bcn_drop(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvi
        const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
        const struct rtw89_port_reg *p = mac->port_base;
 
-       rtw89_write32_set(rtwdev, R_AX_BCN_DROP_ALL0, BIT(rtwvif->port));
+       rtw89_write32_set(rtwdev, p->bcn_drop_all, BIT(rtwvif->port));
        rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK, 1);
        rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_area, B_AX_BCN_MSK_AREA_MASK, 0);
        rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, 0);
@@ -4081,7 +4086,7 @@ static void rtw89_mac_bcn_drop(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvi
        if (rtwvif->port == RTW89_PORT_0)
                rtw89_mac_check_packet_ctrl(rtwdev, rtwvif, AX_PTCL_DBG_BCNQ_NUM1);
 
-       rtw89_write32_clr(rtwdev, R_AX_BCN_DROP_ALL0, BIT(rtwvif->port));
+       rtw89_write32_clr(rtwdev, p->bcn_drop_all, BIT(rtwvif->port));
        rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TBTT_PROHIB_EN);
        fsleep(2000);
 }
index 6388c56a3c9013a8c8ee9676d935f9dfb8a9a288..6447353d35d3561cc01bf17a109769a9cde6a290 100644 (file)
@@ -52,6 +52,9 @@ static const struct rtw89_port_reg rtw89_port_base_be = {
        .mbssid = R_BE_MBSSID_CTRL,
        .mbssid_drop = R_BE_MBSSID_DROP_0,
        .tsf_sync = R_BE_PORT_0_TSF_SYNC,
+       .ptcl_dbg = R_BE_PTCL_DBG,
+       .ptcl_dbg_info = R_BE_PTCL_DBG_INFO,
+       .bcn_drop_all = R_BE_BCN_DROP_ALL0,
        .hiq_win = {R_BE_P0MB_HGQ_WINDOW_CFG_0, R_BE_PORT_HGQ_WINDOW_CFG,
                    R_BE_PORT_HGQ_WINDOW_CFG + 1, R_BE_PORT_HGQ_WINDOW_CFG + 2,
                    R_BE_PORT_HGQ_WINDOW_CFG + 3},
index 26aa2d9bd5262792214f4995d0e591ea42d37fda..23a09efabab7c4cdfc033ea1efb737f3b93f3b15 100644 (file)
 #define R_BE_TSFTR_HIGH_P0_C1 0x1443C
 #define B_BE_TSFTR_HIGH_P0_MASK GENMASK(31, 0)
 
+#define R_BE_BCN_DROP_ALL0 0x10560
+
 #define R_BE_MBSSID_CTRL 0x10568
 #define R_BE_MBSSID_CTRL_C1 0x14568
 #define B_BE_MBSSID_MODE_SEL BIT(20)
 #define B_BE_PTCL_DROP BIT(5)
 #define B_BE_PTCL_TX_QUEUE_IDX_MASK GENMASK(4, 0)
 
+#define R_BE_PTCL_DBG_INFO 0x108F0
+
+#define R_BE_PTCL_DBG 0x108F4
+
 #define R_BE_RX_ERROR_FLAG 0x10C00
 #define R_BE_RX_ERROR_FLAG_C1 0x14C00
 #define B_BE_RX_CSI_NOT_RELEASE_ERROR BIT(31)