wil6210: fix support for sparrow chipsets

the wil6210 driver irq handling code is unconditionally writing
edma irq registers which are supposed to be only used on Talyn chipsets.
This however leade to a chipset hang on the older sparrow chipset
generation and firmware will not even boot.
Fix that by simply checking for edma support before handling these
registers.

Tested on Netgear R9000

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Link: https://patch.msgid.link/20250304012131.25970-2-s.gottschall@dd-wrt.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>

diff --git a/drivers/net/wireless/ath/wil6210/interrupt.c b/drivers/net/wireless/ath/wil6210/interrupt.c
index 67172385a5d66715b183b5bc9ed23c355ee0c781..89d4394cedcff7a912c93b85ad074b50c6ebf376 100644 (file)
--- a/drivers/net/wireless/ath/wil6210/interrupt.c
+++ b/drivers/net/wireless/ath/wil6210/interrupt.c
@@ -179,9 +179,11 @@ void wil_mask_irq(struct wil6210_priv *wil)
        wil_dbg_irq(wil, "mask_irq\n");
 
        wil6210_mask_irq_tx(wil);
-       wil6210_mask_irq_tx_edma(wil);
+       if (wil->use_enhanced_dma_hw)
+               wil6210_mask_irq_tx_edma(wil);
        wil6210_mask_irq_rx(wil);
-       wil6210_mask_irq_rx_edma(wil);
+       if (wil->use_enhanced_dma_hw)
+               wil6210_mask_irq_rx_edma(wil);
        wil6210_mask_irq_misc(wil, true);
        wil6210_mask_irq_pseudo(wil);
 }
@@ -190,10 +192,12 @@ void wil_unmask_irq(struct wil6210_priv *wil)
 {
        wil_dbg_irq(wil, "unmask_irq\n");
 
-       wil_w(wil, RGF_DMA_EP_RX_ICR + offsetof(struct RGF_ICR, ICC),
-             WIL_ICR_ICC_VALUE);
-       wil_w(wil, RGF_DMA_EP_TX_ICR + offsetof(struct RGF_ICR, ICC),
-             WIL_ICR_ICC_VALUE);
+       if (wil->use_enhanced_dma_hw) {
+               wil_w(wil, RGF_DMA_EP_RX_ICR + offsetof(struct RGF_ICR, ICC),
+                     WIL_ICR_ICC_VALUE);
+               wil_w(wil, RGF_DMA_EP_TX_ICR + offsetof(struct RGF_ICR, ICC),
+                     WIL_ICR_ICC_VALUE);
+       }
        wil_w(wil, RGF_DMA_EP_MISC_ICR + offsetof(struct RGF_ICR, ICC),
              WIL_ICR_ICC_MISC_VALUE);
        wil_w(wil, RGF_INT_GEN_TX_ICR + offsetof(struct RGF_ICR, ICC),
@@ -845,10 +849,12 @@ void wil6210_clear_irq(struct wil6210_priv *wil)
                    offsetof(struct RGF_ICR, ICR));
        wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_TX_ICR) +
                    offsetof(struct RGF_ICR, ICR));
-       wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_RX_ICR) +
-                   offsetof(struct RGF_ICR, ICR));
-       wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_TX_ICR) +
-                   offsetof(struct RGF_ICR, ICR));
+       if (wil->use_enhanced_dma_hw) {
+               wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_RX_ICR) +
+                           offsetof(struct RGF_ICR, ICR));
+               wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_TX_ICR) +
+                           offsetof(struct RGF_ICR, ICR));
+       }
        wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_MISC_ICR) +
                    offsetof(struct RGF_ICR, ICR));
        wmb(); /* make sure write completed */