cxl: Unify debug messages when calling devm_cxl_add_dport()
authorRobert Richter <rrichter@amd.com>
Tue, 18 Oct 2022 13:23:32 +0000 (15:23 +0200)
committerDan Williams <dan.j.williams@intel.com>
Mon, 14 Nov 2022 18:37:08 +0000 (10:37 -0800)
CXL dports are added in a couple of code paths using
devm_cxl_add_dport(). Debug messages are individually generated, but are
incomplete and inconsistent. Change this by moving its generation to
devm_cxl_add_dport(). This unifies the messages and reduces code
duplication.  Also, generate messages on failure. Use a
__devm_cxl_add_dport() wrapper to keep the readability of the error
exits.

Signed-off-by: Robert Richter <rrichter@amd.com>
Link: https://lore.kernel.org/r/20221018132341.76259-5-rrichter@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/acpi.c
drivers/cxl/core/pci.c
drivers/cxl/core/port.c
tools/testing/cxl/test/cxl.c

index 767a91f442213b56de7aa62130236bc877375cec..31e104f0210ffc386f22f2642caa068ad38e374e 100644 (file)
@@ -282,12 +282,9 @@ static int add_host_bridge_dport(struct device *match, void *arg)
        }
 
        dport = devm_cxl_add_dport(root_port, match, uid, ctx.chbcr);
-       if (IS_ERR(dport)) {
-               dev_err(host, "failed to add downstream port: %s\n",
-                       dev_name(match));
+       if (IS_ERR(dport))
                return PTR_ERR(dport);
-       }
-       dev_dbg(host, "add dport%llu: %s\n", uid, dev_name(match));
+
        return 0;
 }
 
index 9240df53ed87562839a16967d7a19656c2125a5d..0dbbe8d39b07727ace4435ff2aae9da2c6c4fec3 100644 (file)
@@ -62,8 +62,6 @@ static int match_add_dports(struct pci_dev *pdev, void *data)
        }
        ctx->count++;
 
-       dev_dbg(&port->dev, "add dport%d: %s\n", port_num, dev_name(&pdev->dev));
-
        return 0;
 }
 
index 93560d749aed8b2383f78fe94cd854a5b1f3aec5..0d2f5eaaca7d57eff53eb9805638028068ed1ded 100644 (file)
@@ -899,20 +899,10 @@ static void cxl_dport_unlink(void *data)
        sysfs_remove_link(&port->dev.kobj, link_name);
 }
 
-/**
- * devm_cxl_add_dport - append downstream port data to a cxl_port
- * @port: the cxl_port that references this dport
- * @dport_dev: firmware or PCI device representing the dport
- * @port_id: identifier for this dport in a decoder's target list
- * @component_reg_phys: optional location of CXL component registers
- *
- * Note that dports are appended to the devm release action's of the
- * either the port's host (for root ports), or the port itself (for
- * switch ports)
- */
-struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,
-                                    struct device *dport_dev, int port_id,
-                                    resource_size_t component_reg_phys)
+static struct cxl_dport *__devm_cxl_add_dport(struct cxl_port *port,
+                                             struct device *dport_dev,
+                                             int port_id,
+                                             resource_size_t component_reg_phys)
 {
        char link_name[CXL_TARGET_STRLEN];
        struct cxl_dport *dport;
@@ -964,6 +954,36 @@ struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,
 
        return dport;
 }
+
+/**
+ * devm_cxl_add_dport - append downstream port data to a cxl_port
+ * @port: the cxl_port that references this dport
+ * @dport_dev: firmware or PCI device representing the dport
+ * @port_id: identifier for this dport in a decoder's target list
+ * @component_reg_phys: optional location of CXL component registers
+ *
+ * Note that dports are appended to the devm release action's of the
+ * either the port's host (for root ports), or the port itself (for
+ * switch ports)
+ */
+struct cxl_dport *devm_cxl_add_dport(struct cxl_port *port,
+                                    struct device *dport_dev, int port_id,
+                                    resource_size_t component_reg_phys)
+{
+       struct cxl_dport *dport;
+
+       dport = __devm_cxl_add_dport(port, dport_dev, port_id,
+                                    component_reg_phys);
+       if (IS_ERR(dport)) {
+               dev_dbg(dport_dev, "failed to add dport to %s: %ld\n",
+                       dev_name(&port->dev), PTR_ERR(dport));
+       } else {
+               dev_dbg(dport_dev, "dport added to %s\n",
+                       dev_name(&port->dev));
+       }
+
+       return dport;
+}
 EXPORT_SYMBOL_NS_GPL(devm_cxl_add_dport, CXL);
 
 static int add_ep(struct cxl_ep *new)
index 7edce12fd2ce58515b3214b5143d35bad9d4d92c..a5146d80ecc48077949519e4613af74656817caf 100644 (file)
@@ -634,7 +634,6 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm)
 
 static int mock_cxl_port_enumerate_dports(struct cxl_port *port)
 {
-       struct device *dev = &port->dev;
        struct platform_device **array;
        int i, array_size;
 
@@ -684,14 +683,8 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port)
                dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id,
                                           CXL_RESOURCE_NONE);
 
-               if (IS_ERR(dport)) {
-                       dev_err(dev, "failed to add dport: %s (%ld)\n",
-                               dev_name(&pdev->dev), PTR_ERR(dport));
+               if (IS_ERR(dport))
                        return PTR_ERR(dport);
-               }
-
-               dev_dbg(dev, "add dport%d: %s\n", pdev->id,
-                       dev_name(&pdev->dev));
        }
 
        return 0;