phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers

For all other generations, we have been using just the QPHY prefix for
the PCS registers. Remove the _USB part of the QPHY_USB prefix.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 5e6fc8103e9d81214a8cbe175895c2c3d0125487..02d22595f747a03bd5974378a9e4a598c8aa326b 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -845,28 +845,28 @@ static const struct qmp_phy_init_tbl sm8550_usb3_rx_tbl[] = {
 };
 
 static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10),
 };
 
 static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
-       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+       QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
 };
 
 static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index c38530d6776b4a5022c302100626671b5669b7d6..cf4464849006415bb8ef5ab309f8eb77fecedb90 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -7,26 +7,26 @@
 #define QCOM_PHY_QMP_PCS_USB_V6_H_
 
 /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1            0xc4
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2            0xc8
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3            0xcc
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6            0xd8
-#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1             0xdc
-#define QPHY_USB_V6_PCS_POWER_STATE_CONFIG1            0x90
-#define QPHY_USB_V6_PCS_RX_SIGDET_LVL                  0x188
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L           0x190
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H           0x194
-#define QPHY_USB_V6_PCS_CDR_RESET_TIME                 0x1b0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1           0x1c0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2           0x1c4
-#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG               0x1d0
-#define QPHY_USB_V6_PCS_EQ_CONFIG1                     0x1dc
-#define QPHY_USB_V6_PCS_EQ_CONFIG5                     0x1ec
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1                0xc4
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2                0xc8
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3                0xcc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6                0xd8
+#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1         0xdc
+#define QPHY_V6_PCS_POWER_STATE_CONFIG1                0x90
+#define QPHY_V6_PCS_RX_SIGDET_LVL                      0x188
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L               0x190
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H               0x194
+#define QPHY_V6_PCS_CDR_RESET_TIME                     0x1b0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1               0x1c0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2               0x1c4
+#define QPHY_V6_PCS_PCS_TX_RX_CONFIG           0x1d0
+#define QPHY_V6_PCS_EQ_CONFIG1                 0x1dc
+#define QPHY_V6_PCS_EQ_CONFIG5                 0x1ec
 
-#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1       0x00
-#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL   0x18
-#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2  0x3c
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L                0x40
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H                0x44
+#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1           0x00
+#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL       0x18
+#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2      0x3c
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L            0x40
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H            0x44
 
 #endif