drm/xe/xe2: Add missing mocs entry

Add index 4 so WB on both L3 and L4 can be used by userspace.

Bspec: 71582
Link: https://lore.kernel.org/all/7oqovb356dx2hm5muop3xjqr4kv7m5fzjisch3vmsmxm33ygtv@eib4jielia35/
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231004150317.3473731-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
index ada3114be4fa168580c7a4abb099f065731a706d..19a8146ded9a76c8ba01075f7e287b32840f7859 100644 (file)
--- a/drivers/gpu/drm/xe/xe_mocs.c
+++ b/drivers/gpu/drm/xe/xe_mocs.c
@@ -385,6 +385,8 @@ static const struct xe_mocs_entry xe2_mocs_table[] = {
        MOCS_ENTRY(2, IG_PAT | XE2_L3_3_UC | L4_0_WB, 0),
        /* Uncached L3 + L4 */
        MOCS_ENTRY(3, IG_PAT | XE2_L3_3_UC | L4_3_UC, 0),
+       /* Cached L3 + L4 */
+       MOCS_ENTRY(4, IG_PAT | XE2_L3_0_WB | L4_0_WB, 0),
 };
 
 static unsigned int get_mocs_settings(struct xe_device *xe,