RDMA/hns: Remove redundant hardware opcode definitions

HNS_ROCE_SQ_OPCODE_XXXs and HNS_ROCE_V2_WQE_OP_XXXs have same values, so
remove a set of redundant definitions. In addition, remove the suffix of
HNS_ROCE_V2_WQE_OP_BIND_MW_TYPE.

Link: https://lore.kernel.org/r/1595932941-40613-2-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 2b0b676e4c2fc12e7ca15947a814ae59d3b50e0a..35d46b7e56b8ce7c9935393ae4b8b0c98dd9f5be 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -3169,51 +3169,51 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq,
                /* SQ corresponding to CQE */
                switch (roce_get_field(cqe->byte_4, V2_CQE_BYTE_4_OPCODE_M,
                                       V2_CQE_BYTE_4_OPCODE_S) & 0x1f) {
-               case HNS_ROCE_SQ_OPCODE_SEND:
+               case HNS_ROCE_V2_WQE_OP_SEND:
                        wc->opcode = IB_WC_SEND;
                        break;
-               case HNS_ROCE_SQ_OPCODE_SEND_WITH_INV:
+               case HNS_ROCE_V2_WQE_OP_SEND_WITH_INV:
                        wc->opcode = IB_WC_SEND;
                        break;
-               case HNS_ROCE_SQ_OPCODE_SEND_WITH_IMM:
+               case HNS_ROCE_V2_WQE_OP_SEND_WITH_IMM:
                        wc->opcode = IB_WC_SEND;
                        wc->wc_flags |= IB_WC_WITH_IMM;
                        break;
-               case HNS_ROCE_SQ_OPCODE_RDMA_READ:
+               case HNS_ROCE_V2_WQE_OP_RDMA_READ:
                        wc->opcode = IB_WC_RDMA_READ;
                        wc->byte_len = le32_to_cpu(cqe->byte_cnt);
                        break;
-               case HNS_ROCE_SQ_OPCODE_RDMA_WRITE:
+               case HNS_ROCE_V2_WQE_OP_RDMA_WRITE:
                        wc->opcode = IB_WC_RDMA_WRITE;
                        break;
-               case HNS_ROCE_SQ_OPCODE_RDMA_WRITE_WITH_IMM:
+               case HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM:
                        wc->opcode = IB_WC_RDMA_WRITE;
                        wc->wc_flags |= IB_WC_WITH_IMM;
                        break;
-               case HNS_ROCE_SQ_OPCODE_LOCAL_INV:
+               case HNS_ROCE_V2_WQE_OP_LOCAL_INV:
                        wc->opcode = IB_WC_LOCAL_INV;
                        wc->wc_flags |= IB_WC_WITH_INVALIDATE;
                        break;
-               case HNS_ROCE_SQ_OPCODE_ATOMIC_COMP_AND_SWAP:
+               case HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP:
                        wc->opcode = IB_WC_COMP_SWAP;
                        wc->byte_len  = 8;
                        break;
-               case HNS_ROCE_SQ_OPCODE_ATOMIC_FETCH_AND_ADD:
+               case HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD:
                        wc->opcode = IB_WC_FETCH_ADD;
                        wc->byte_len  = 8;
                        break;
-               case HNS_ROCE_SQ_OPCODE_ATOMIC_MASK_COMP_AND_SWAP:
+               case HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP:
                        wc->opcode = IB_WC_MASKED_COMP_SWAP;
                        wc->byte_len  = 8;
                        break;
-               case HNS_ROCE_SQ_OPCODE_ATOMIC_MASK_FETCH_AND_ADD:
+               case HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD:
                        wc->opcode = IB_WC_MASKED_FETCH_ADD;
                        wc->byte_len  = 8;
                        break;
-               case HNS_ROCE_SQ_OPCODE_FAST_REG_WR:
+               case HNS_ROCE_V2_WQE_OP_FAST_REG_PMR:
                        wc->opcode = IB_WC_REG_MR;
                        break;
-               case HNS_ROCE_SQ_OPCODE_BIND_MW:
+               case HNS_ROCE_V2_WQE_OP_BIND_MW:
                        wc->opcode = IB_WC_REG_MR;
                        break;
                default:

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index e176b0aaa4ac2a41cbf04df432e9bc450c2e0421..53c26f380f25883e5e95fe712d5d69ce3f64fa9e 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -179,26 +179,10 @@ enum {
        HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD       = 0x9,
        HNS_ROCE_V2_WQE_OP_FAST_REG_PMR                 = 0xa,
        HNS_ROCE_V2_WQE_OP_LOCAL_INV                    = 0xb,
-       HNS_ROCE_V2_WQE_OP_BIND_MW_TYPE                 = 0xc,
+       HNS_ROCE_V2_WQE_OP_BIND_MW                      = 0xc,
        HNS_ROCE_V2_WQE_OP_MASK                         = 0x1f,
 };
 
-enum {
-       HNS_ROCE_SQ_OPCODE_SEND = 0x0,
-       HNS_ROCE_SQ_OPCODE_SEND_WITH_INV = 0x1,
-       HNS_ROCE_SQ_OPCODE_SEND_WITH_IMM = 0x2,
-       HNS_ROCE_SQ_OPCODE_RDMA_WRITE = 0x3,
-       HNS_ROCE_SQ_OPCODE_RDMA_WRITE_WITH_IMM = 0x4,
-       HNS_ROCE_SQ_OPCODE_RDMA_READ = 0x5,
-       HNS_ROCE_SQ_OPCODE_ATOMIC_COMP_AND_SWAP = 0x6,
-       HNS_ROCE_SQ_OPCODE_ATOMIC_FETCH_AND_ADD = 0x7,
-       HNS_ROCE_SQ_OPCODE_ATOMIC_MASK_COMP_AND_SWAP = 0x8,
-       HNS_ROCE_SQ_OPCODE_ATOMIC_MASK_FETCH_AND_ADD = 0x9,
-       HNS_ROCE_SQ_OPCODE_FAST_REG_WR = 0xa,
-       HNS_ROCE_SQ_OPCODE_LOCAL_INV = 0xb,
-       HNS_ROCE_SQ_OPCODE_BIND_MW = 0xc,
-};
-
 enum {
        /* rq operations */
        HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM = 0x0,