}
}
+static void lpuart_wait_bit_set(struct uart_port *port, unsigned int offset,
+ u8 bit)
+{
+ while (!(readb(port->membase + offset) & bit))
+ barrier();
+}
+
+static void lpuart32_wait_bit_set(struct uart_port *port, unsigned int offset,
+ u32 bit)
+{
+ while (!(lpuart32_read(port, offset) & bit))
+ barrier();
+}
+
#if defined(CONFIG_CONSOLE_POLL)
static int lpuart_poll_init(struct uart_port *port)
static void lpuart_poll_put_char(struct uart_port *port, unsigned char c)
{
/* drain */
- while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE))
- barrier();
-
+ lpuart_wait_bit_set(port, UARTSR1, UARTSR1_TDRE);
writeb(c, port->membase + UARTDR);
}
static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c)
{
- while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE))
- barrier();
-
+ lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TDRE);
lpuart32_write(port, UARTDATA, c);
}
uart_update_timeout(port, termios->c_cflag, baud);
/* wait transmit engin complete */
- while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC))
- barrier();
+ lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC);
/* disable transmit and receive */
writeb(old_cr2 & ~(UARTCR2_TE | UARTCR2_RE),
uart_update_timeout(port, termios->c_cflag, baud);
/* wait transmit engin complete */
- while (!(lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_TC))
- barrier();
+ lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
/* disable transmit and receive */
lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE),
#ifdef CONFIG_SERIAL_FSL_LPUART_CONSOLE
static void lpuart_console_putchar(struct uart_port *port, int ch)
{
- while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE))
- barrier();
-
+ lpuart_wait_bit_set(port, UARTSR1, UARTSR1_TDRE);
writeb(ch, port->membase + UARTDR);
}
static void lpuart32_console_putchar(struct uart_port *port, int ch)
{
- while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE))
- barrier();
-
+ lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TDRE);
lpuart32_write(port, ch, UARTDATA);
}
uart_console_write(&sport->port, s, count, lpuart_console_putchar);
/* wait for transmitter finish complete and restore CR2 */
- while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC))
- barrier();
+ lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC);
writeb(old_cr2, sport->port.membase + UARTCR2);
uart_console_write(&sport->port, s, count, lpuart32_console_putchar);
/* wait for transmitter finish complete and restore CR2 */
- while (!(lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_TC))
- barrier();
+ lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
lpuart32_write(&sport->port, old_cr, UARTCTRL);