clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Thu, 15 Jun 2023 09:32:27 +0000 (12:32 +0300)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 21 Jun 2023 07:42:48 +0000 (10:42 +0300)
s/ep_chg_chg_id/ep_chg_id in documentation of master clock structure.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230615093227.576102-12-claudiu.beznea@microchip.com
drivers/clk/at91/sama7g5.c

index 7e06ea22c8afba71bfd9b3c32010bd394d7e431c..91b5c6f14819642d2400fcfcc541a43de5f85c49 100644 (file)
@@ -354,10 +354,10 @@ static struct sama7g5_pll {
 /*
  * Master clock (MCK[1..4]) description
  * @n:                 clock name
- * @ep_chg_chg_id:     index in parents array that specifies the changeable
  * @ep:                        extra parents names array (entry formed by PLL components
  *                     identifiers (see enum pll_component_id))
  * @hw:                        pointer to clk_hw
+ * @ep_chg_id:         index in parents array that specifies the changeable
  *                     parent
  * @ep_count:          extra parents count
  * @ep_mux_table:      mux table for extra parents