drm/i915: Flatten hsw_crtc_compute_clock()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 13 Sep 2021 14:44:28 +0000 (17:44 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 15 Sep 2021 15:08:29 +0000 (18:08 +0300)
hsw_crtc_compute_clock() has become spaghetti. Flatten
it a bit to make it at least semi-legible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913144440.23008-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_dpll.c

index 210f91f4a576765f2fb70b2ee3570b8d4aab1e21..ace9157a1c30a1b1d9120a5d8ed681b00c50ad73 100644 (file)
@@ -937,16 +937,18 @@ static int hsw_crtc_compute_clock(struct intel_crtc_state *crtc_state)
        struct intel_encoder *encoder =
                intel_get_crtc_new_encoder(state, crtc_state);
 
-       if (IS_DG2(dev_priv)) {
+       if (IS_DG2(dev_priv))
                return intel_mpllb_calc_state(crtc_state, encoder);
-       } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
-                  DISPLAY_VER(dev_priv) >= 11) {
-               if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
-                       drm_dbg_kms(&dev_priv->drm,
-                                   "failed to find PLL for pipe %c\n",
-                                   pipe_name(crtc->pipe));
-                       return -EINVAL;
-               }
+
+       if (DISPLAY_VER(dev_priv) < 11 &&
+           intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
+               return 0;
+
+       if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
+               drm_dbg_kms(&dev_priv->drm,
+                           "failed to find PLL for pipe %c\n",
+                           pipe_name(crtc->pipe));
+               return -EINVAL;
        }
 
        return 0;