net/mlx4_en: Prevent potential integer overflow calculating Hz
authorDan Carpenter <dan.carpenter@linaro.org>
Wed, 28 May 2025 08:11:09 +0000 (11:11 +0300)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 29 May 2025 10:37:42 +0000 (12:37 +0200)
The "freq" variable is in terms of MHz and "max_val_cycles" is in terms
of Hz.  The fact that "max_val_cycles" is a u64 suggests that support
for high frequency is intended but the "freq_khz * 1000" would overflow
the u32 type if we went above 4GHz.  Use unsigned long long type for the
mutliplication to prevent that.

Fixes: 31c128b66e5b ("net/mlx4_en: Choose time-stamping shift value according to HW frequency")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/aDbFHe19juIJKjsb@stanley.mountain
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/mellanox/mlx4/en_clock.c

index cd754cd76bde1b2834e02de37678c9ca3bab1504..d73a2044dc2662f34365db74d2fd2338fd19a013 100644 (file)
@@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
 static u32 freq_to_shift(u16 freq)
 {
        u32 freq_khz = freq * 1000;
-       u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
+       u64 max_val_cycles = freq_khz * 1000ULL * MLX4_EN_WRAP_AROUND_SEC;
        u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
        /* calculate max possible multiplier in order to fit in 64bit */
        u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);