drm/amdgpu: add JPEG2.0 decode ring ib test
authorLeo Liu <leo.liu@amd.com>
Mon, 15 Oct 2018 20:17:27 +0000 (16:17 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Jun 2019 23:58:22 +0000 (18:58 -0500)
Add internal register offset for registers involving in ib tests

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

index ef2b7a9356ef3d3b13d65c2b1d676129e603c8db..6a74f5499ef71b64c5ef3ed30d9885b1e870f61f 100644 (file)
@@ -669,7 +669,7 @@ static int amdgpu_vcn_jpeg_set_reg(struct amdgpu_ring *ring, uint32_t handle,
 
        ib = &job->ibs[0];
 
-       ib->ptr[0] = PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9), 0, 0, PACKETJ_TYPE0);
+       ib->ptr[0] = PACKETJ(adev->vcn.internal.jpeg_pitch, 0, 0, PACKETJ_TYPE0);
        ib->ptr[1] = 0xDEADBEEF;
        for (i = 2; i < 16; i += 2) {
                ib->ptr[i] = PACKETJ(0, 0, 0, PACKETJ_TYPE6);
@@ -715,7 +715,7 @@ int amdgpu_vcn_jpeg_ring_test_ib(struct amdgpu_ring *ring, long timeout)
        }
 
        for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9));
+               tmp = RREG32(adev->vcn.external.jpeg_pitch);
                if (tmp == 0xDEADBEEF)
                        break;
                DRM_UDELAY(1);