drm/amdgpu: define MQD abstract layer for hw ip

Define MQD abstract layer for hw ip, for the passing
mqd configuration not only from ring but more sources,
like user queue.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fc3225eb714208b9ffecf7b4b06f2f3c4d50ee89..b31321be2c25be04d1e266a6f35494e0edf8c6e6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -720,6 +720,26 @@ struct ip_discovery_top;
                                          (rid == 0x01) || \
                                          (rid == 0x10))))
 
+struct amdgpu_mqd_prop {
+       uint64_t mqd_gpu_addr;
+       uint64_t hqd_base_gpu_addr;
+       uint64_t rptr_gpu_addr;
+       uint64_t wptr_gpu_addr;
+       uint32_t queue_size;
+       bool use_doorbell;
+       uint32_t doorbell_index;
+       uint64_t eop_gpu_addr;
+       uint32_t hqd_pipe_priority;
+       uint32_t hqd_queue_priority;
+       bool hqd_active;
+};
+
+struct amdgpu_mqd {
+       unsigned mqd_size;
+       int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
+                       struct amdgpu_mqd_prop *p);
+};
+
 #define AMDGPU_RESET_MAGIC_NUM 64
 #define AMDGPU_MAX_DF_PERFMONS 4
 #define AMDGPU_PRODUCT_NAME_LEN 64
@@ -920,6 +940,7 @@ struct amdgpu_device {
        /* mes */
        bool                            enable_mes;
        struct amdgpu_mes               mes;
+       struct amdgpu_mqd               mqds[AMDGPU_HW_IP_NUM];
 
        /* df */
        struct amdgpu_df                df;