drm/amd/powerplay: add new bit mask to ctrl clock stretch feature.
authorRex Zhu <Rex.Zhu@amd.com>
Thu, 27 Oct 2016 09:48:49 +0000 (17:48 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Nov 2016 15:20:53 +0000 (10:20 -0500)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index 9e49f2777143ae5b59ce0808cdccc4ce8be2f66e..a50765d189497f42471c2d8babbfb5b0718e5120 100644 (file)
@@ -1428,7 +1428,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
                phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
                                PHM_PlatformCaps_ControlVDDCI);
 
-       if ((hwmgr->pp_table_version != PP_TABLE_V0)
+       if ((hwmgr->pp_table_version != PP_TABLE_V0) && (hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK)
                && (table_info->cac_dtp_table->usClockStretchAmount != 0))
                phm_cap_set(hwmgr->platform_descriptor.platformCaps,
                                        PHM_PlatformCaps_ClockStretcher);
index e38b999e32355dd690823e468bf662ca765d5176..36effa19abddceda09197ffb28b1460299ae7e81 100644 (file)
@@ -85,7 +85,8 @@ enum PP_FEATURE_MASK {
        PP_SMC_VOLTAGE_CONTROL_MASK = 0x40,
        PP_VBI_TIME_SUPPORT_MASK = 0x80,
        PP_ULV_MASK = 0x100,
-       PP_ENABLE_GFX_CG_THRU_SMU = 0x200
+       PP_ENABLE_GFX_CG_THRU_SMU = 0x200,
+       PP_CLOCK_STRETCH_MASK = 0x400,
 };
 
 enum PHM_BackEnd_Magic {