arm64: dts: imx8qm-mek: add cm4 remote-proc and related memory region

Add two cm4 remote-proc and related memory regions.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 3f0fd147bbd0e19ccec36a6e948d784f168bb183..72ed94bd731bb90f8b374f6eb76408718db575b8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -31,6 +31,68 @@
                reg = <0x00000000 0x80000000 0 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               vdev0vring0: memory@90000000 {
+                       reg = <0 0x90000000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev0vring1: memory@90008000 {
+                       reg = <0 0x90008000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev1vring0: memory@90010000 {
+                       reg = <0 0x90010000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev1vring1: memory@90018000 {
+                       reg = <0 0x90018000 0 0x8000>;
+                       no-map;
+               };
+
+               rsc_table0: memory@900ff000 {
+                       reg = <0 0x900ff000 0 0x1000>;
+                       no-map;
+               };
+
+               vdev2vring0: memory@90100000 {
+                       reg = <0 0x90100000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev2vring1: memory@90108000 {
+                       reg = <0 0x90108000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev3vring0: memory@90110000 {
+                       reg = <0 0x90110000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev3vring1: memory@90118000 {
+                       reg = <0 0x90118000 0 0x8000>;
+                       no-map;
+               };
+
+               rsc_table1: memory@901ff000 {
+                       reg = <0 0x901ff000 0 0x1000>;
+                       no-map;
+               };
+
+               vdevbuffer: memory@90400000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x90400000 0 0x100000>;
+                       no-map;
+               };
+       };
+
        reg_usdhc2_vmmc: usdhc2-vmmc {
                compatible = "regulator-fixed";
                regulator-name = "SD1_SPWR";
@@ -133,6 +195,37 @@
                                "LINPUT1", "Mic Jack",
                                "Mic Jack", "MICB";
        };
+
+       imx8qm-cm4-0 {
+               compatible = "fsl,imx8qm-cm4";
+               clocks = <&clk_dummy>;
+               mbox-names = "tx", "rx", "rxdb";
+               mboxes = <&lsio_mu5 0 1
+                         &lsio_mu5 1 1
+                         &lsio_mu5 3 1>;
+               memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+                               <&vdev1vring0>, <&vdev1vring1>, <&rsc_table0>;
+               power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
+
+               fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
+               fsl,entry-address = <0x34fe0000>;
+       };
+
+       imx8qm-cm4-1 {
+               compatible = "fsl,imx8qm-cm4";
+               clocks = <&clk_dummy>;
+               mbox-names = "tx", "rx", "rxdb";
+               mboxes = <&lsio_mu6 0 1
+                         &lsio_mu6 1 1
+                         &lsio_mu6 3 1>;
+               memory-region = <&vdevbuffer>, <&vdev2vring0>, <&vdev2vring1>,
+                               <&vdev3vring0>, <&vdev3vring1>, <&rsc_table1>;
+               power-domains = <&pd IMX_SC_R_M4_1_PID0>, <&pd IMX_SC_R_M4_1_MU_1A>;
+
+               fsl,resource-id = <IMX_SC_R_M4_1_PID0>;
+               fsl,entry-address = <0x38fe0000>;
+       };
+
 };
 
 &adc0 {