drm/i915: Unlock PPS registers after GPU reset
authorImre Deak <imre.deak@intel.com>
Wed, 14 Sep 2016 10:04:13 +0000 (13:04 +0300)
committerImre Deak <imre.deak@intel.com>
Tue, 20 Sep 2016 12:04:43 +0000 (15:04 +0300)
Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.

Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1473847453-4771-1-git-send-email-imre.deak@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
drivers/gpu/drm/i915/intel_display.c

index 69b80d078f06da6a6a9cbeaf6c3df68260453f46..18fdbb7f6c28df5a70875af804e392243fc54374 100644 (file)
@@ -3627,6 +3627,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
                intel_runtime_pm_disable_interrupts(dev_priv);
                intel_runtime_pm_enable_interrupts(dev_priv);
 
+               intel_pps_unlock_regs_wa(dev_priv);
                intel_modeset_init_hw(dev);
 
                spin_lock_irq(&dev_priv->irq_lock);