drm/i915/lobf: Disintegrate alpm_disable from psr_disable
authorAnimesh Manna <animesh.manna@intel.com>
Wed, 23 Apr 2025 09:23:27 +0000 (14:53 +0530)
committerAnimesh Manna <animesh.manna@intel.com>
Thu, 24 Apr 2025 08:24:36 +0000 (13:54 +0530)
Currently clearing of alpm registers is done through psr_disable()
which is always not correct, without psr also alpm can exist. So
dis-integrate alpm_disable() from psr_disable().

v1: Initial version.
v2:
- Remove h/w register read from alpm_disable(). [Jani]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-5-animesh.manna@intel.com
drivers/gpu/drm/i915/display/intel_alpm.c
drivers/gpu/drm/i915/display/intel_alpm.h
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_psr.c

index 9227bb0b0c5592334f2b40308aed36f5389bdaf4..e66ffdbfdb0d2f9668403beda7a958d1d949ec4a 100644 (file)
@@ -369,6 +369,7 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
                          const struct intel_crtc_state *crtc_state)
 {
        lnl_alpm_configure(intel_dp, crtc_state);
+       intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder;
 }
 
 void intel_alpm_post_plane_update(struct intel_atomic_state *state,
@@ -444,3 +445,20 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
        debugfs_create_file("i915_edp_lobf_info", 0444, root,
                            connector, &i915_edp_lobf_info_fops);
 }
+
+void intel_alpm_disable(struct intel_dp *intel_dp)
+{
+       struct intel_display *display = to_intel_display(intel_dp);
+       enum transcoder cpu_transcoder = intel_dp->alpm_parameters.transcoder;
+
+       if (DISPLAY_VER(display) < 20)
+               return;
+
+       intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
+                    ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
+                    ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+
+       intel_de_rmw(display,
+                    PORT_ALPM_CTL(cpu_transcoder),
+                    PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+}
index 2f862b0476a8a17b452bccdf70bdd4eac669ee39..91f51fb24f981bcf4abc754cf76dd659f1517fcd 100644 (file)
@@ -28,4 +28,5 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
 bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
 bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
+void intel_alpm_disable(struct intel_dp *intel_dp);
 #endif
index e90fa7984e28ba01596bcbd2719cfe94369821ec..74132c1d63858c8b18ac9add118622bccee72d6a 100644 (file)
@@ -36,6 +36,7 @@
 #include "i915_reg.h"
 #include "i915_utils.h"
 #include "icl_dsi.h"
+#include "intel_alpm.h"
 #include "intel_audio.h"
 #include "intel_audio_regs.h"
 #include "intel_backlight.h"
@@ -3554,6 +3555,7 @@ static void intel_ddi_disable_dp(struct intel_atomic_state *state,
        intel_dp->link.active = false;
 
        intel_psr_disable(intel_dp, old_crtc_state);
+       intel_alpm_disable(intel_dp);
        intel_edp_backlight_off(old_conn_state);
        /* Disable the decompression in DP Sink */
        intel_dp_sink_disable_decompression(state,
index ee84c1215e54bce0385c9a8980b16bdd0fc125b8..f28edaad327077553f0ec378f9d733c6ab37bad7 100644 (file)
@@ -1808,6 +1808,7 @@ struct intel_dp {
        struct {
                u8 io_wake_lines;
                u8 fast_wake_lines;
+               enum transcoder transcoder;
 
                /* LNL and beyond */
                u8 check_entry_lines;
index bc0f7d0a63432e803542edb46a9825a6e365401c..b3d324bd5eff194bfeb356abde276df53d1469bc 100644 (file)
@@ -2194,17 +2194,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
        if (intel_dp_is_edp(intel_dp))
                intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
 
-       /* Panel Replay on eDP is always using ALPM aux less. */
-       if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
-               intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-                            ALPM_CTL_ALPM_ENABLE |
-                            ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-
-               intel_de_rmw(display,
-                            PORT_ALPM_CTL(cpu_transcoder),
-                            PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-       }
-
        /* Disable PSR on Sink */
        if (!intel_dp->psr.panel_replay_enabled) {
                drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);