mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
if (napi_complete(napi))
- mt7615_irq_enable(dev, mt7615_tx_mcu_int_mask(dev));
+ mt76_connac_irq_enable(&dev->mt76,
+ mt7615_tx_mcu_int_mask(dev));
mt76_connac_pm_unref(&dev->mphy, &dev->pm);
else
mask |= MT_INT_MCU_CMD;
- mt7615_irq_enable(dev, mask);
+ mt76_connac_irq_enable(&dev->mt76, mask);
mt7615_dma_start(dev);
static void
mt7615_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
{
- struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
-
- mt7615_irq_enable(dev, MT_INT_RX_DONE(q));
+ mt76_connac_irq_enable(mdev, MT_INT_RX_DONE(q));
}
static irqreturn_t mt7615_irq_handler(int irq, void *dev_instance)
int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
-static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
-{
- mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
-
- tasklet_schedule(&dev->mt76.irq_tasklet);
-}
-
static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
{
return dev->fw_ver > MT7615_FIRMWARE_V2;
return ant_to_spe[antenna_mask];
}
+static inline void mt76_connac_irq_enable(struct mt76_dev *dev, u32 mask)
+{
+ mt76_set_irq_mask(dev, 0, 0, mask);
+ tasklet_schedule(&dev->irq_tasklet);
+}
+
int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm);
void mt76_connac_power_save_sched(struct mt76_phy *phy,
struct mt76_connac_pm *pm);
mt76_connac_tx_cleanup(&dev->mt76);
if (napi_complete(napi))
- mt7921_irq_enable(dev, MT_INT_TX_DONE_ALL);
+ mt76_connac_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);
mt76_connac_pm_unref(&dev->mphy, &dev->pm);
return 0;
mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
/* enable interrupts for TX/RX rings */
- mt7921_irq_enable(dev,
- MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
- MT_INT_MCU_CMD);
+ mt76_connac_irq_enable(&dev->mt76,
+ MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
+ MT_INT_MCU_CMD);
mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
return 0;
int mt7921_mcu_set_rxfilter(struct mt7921_dev *dev, u32 fif,
u8 bit_op, u32 bit_map);
-static inline void mt7921_irq_enable(struct mt7921_dev *dev, u32 mask)
-{
- mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
-
- tasklet_schedule(&dev->mt76.irq_tasklet);
-}
-
static inline u32
mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr)
{
static void
mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
{
- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
-
if (q == MT_RXQ_MAIN)
- mt7921_irq_enable(dev, MT_INT_RX_DONE_DATA);
+ mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_DATA);
else if (q == MT_RXQ_MCU_WA)
- mt7921_irq_enable(dev, MT_INT_RX_DONE_WM2);
+ mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM2);
else
- mt7921_irq_enable(dev, MT_INT_RX_DONE_WM);
+ mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM);
}
static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance)
/* enable interrupt */
mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
- mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
- MT_INT_MCU_CMD);
+ mt76_connac_irq_enable(&dev->mt76,
+ MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
+ MT_INT_MCU_CMD);
mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
/* put dma enabled */