mlxsw: Add a resource describing number of RIFs
authorPetr Machata <petrm@nvidia.com>
Thu, 16 Jun 2022 10:42:37 +0000 (13:42 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 17 Jun 2022 09:31:33 +0000 (10:31 +0100)
The Spectrum ASIC has a limit on how many L3 devices (called RIFs) can be
created. The limit depends on the ASIC and FW revision, and mlxsw reads it
from the FW. In order to communicate both the number of RIFs that there can
be, and how many are taken now (i.e. occupancy), introduce a corresponding
devlink resource.

Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Amit Cohen <amcohen@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.h
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

index c949005f56dcfd3855d106d5996d3a35187ebb9f..a62887b8d98e4fec8eb8ef97e34e26a0575b2dfd 100644 (file)
@@ -3580,6 +3580,25 @@ mlxsw_sp_resources_rif_mac_profile_register(struct mlxsw_core *mlxsw_core)
                                         &size_params);
 }
 
+static int mlxsw_sp_resources_rifs_register(struct mlxsw_core *mlxsw_core)
+{
+       struct devlink *devlink = priv_to_devlink(mlxsw_core);
+       struct devlink_resource_size_params size_params;
+       u64 max_rifs;
+
+       if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_RIFS))
+               return -EIO;
+
+       max_rifs = MLXSW_CORE_RES_GET(mlxsw_core, MAX_RIFS);
+       devlink_resource_size_params_init(&size_params, max_rifs, max_rifs,
+                                         1, DEVLINK_RESOURCE_UNIT_ENTRY);
+
+       return devlink_resource_register(devlink, "rifs", max_rifs,
+                                        MLXSW_SP_RESOURCE_RIFS,
+                                        DEVLINK_RESOURCE_ID_PARENT_TOP,
+                                        &size_params);
+}
+
 static int mlxsw_sp1_resources_register(struct mlxsw_core *mlxsw_core)
 {
        int err;
@@ -3604,8 +3623,13 @@ static int mlxsw_sp1_resources_register(struct mlxsw_core *mlxsw_core)
        if (err)
                goto err_resources_rif_mac_profile_register;
 
+       err = mlxsw_sp_resources_rifs_register(mlxsw_core);
+       if (err)
+               goto err_resources_rifs_register;
+
        return 0;
 
+err_resources_rifs_register:
 err_resources_rif_mac_profile_register:
 err_policer_resources_register:
 err_resources_counter_register:
@@ -3638,8 +3662,13 @@ static int mlxsw_sp2_resources_register(struct mlxsw_core *mlxsw_core)
        if (err)
                goto err_resources_rif_mac_profile_register;
 
+       err = mlxsw_sp_resources_rifs_register(mlxsw_core);
+       if (err)
+               goto err_resources_rifs_register;
+
        return 0;
 
+err_resources_rifs_register:
 err_resources_rif_mac_profile_register:
 err_policer_resources_register:
 err_resources_counter_register:
index a60d2bbd3aa6e258e8787a98c1e194d32089e9ed..36c6f5b89c7102c21696d9e26cdf21fdb573b5ce 100644 (file)
@@ -68,6 +68,7 @@ enum mlxsw_sp_resource_id {
        MLXSW_SP_RESOURCE_GLOBAL_POLICERS,
        MLXSW_SP_RESOURCE_SINGLE_RATE_POLICERS,
        MLXSW_SP_RESOURCE_RIF_MAC_PROFILES,
+       MLXSW_SP_RESOURCE_RIFS,
 };
 
 struct mlxsw_sp_port;
index 07d7e244dfbd2cbd7cf78bc3283fd1c5fb264cab..4c7721506603ee6dca365d0275cc33958aca3458 100644 (file)
@@ -8323,6 +8323,13 @@ static u64 mlxsw_sp_rif_mac_profiles_occ_get(void *priv)
        return atomic_read(&mlxsw_sp->router->rif_mac_profiles_count);
 }
 
+static u64 mlxsw_sp_rifs_occ_get(void *priv)
+{
+       const struct mlxsw_sp *mlxsw_sp = priv;
+
+       return atomic_read(&mlxsw_sp->router->rifs_count);
+}
+
 static struct mlxsw_sp_rif_mac_profile *
 mlxsw_sp_rif_mac_profile_create(struct mlxsw_sp *mlxsw_sp, const char *mac,
                                struct netlink_ext_ack *extack)
@@ -9828,6 +9835,10 @@ static int mlxsw_sp_rifs_init(struct mlxsw_sp *mlxsw_sp)
                                          MLXSW_SP_RESOURCE_RIF_MAC_PROFILES,
                                          mlxsw_sp_rif_mac_profiles_occ_get,
                                          mlxsw_sp);
+       devlink_resource_occ_get_register(devlink,
+                                         MLXSW_SP_RESOURCE_RIFS,
+                                         mlxsw_sp_rifs_occ_get,
+                                         mlxsw_sp);
 
        return 0;
 }
@@ -9841,6 +9852,7 @@ static void mlxsw_sp_rifs_fini(struct mlxsw_sp *mlxsw_sp)
        for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
                WARN_ON_ONCE(mlxsw_sp->router->rifs[i]);
 
+       devlink_resource_occ_get_unregister(devlink, MLXSW_SP_RESOURCE_RIFS);
        devlink_resource_occ_get_unregister(devlink,
                                            MLXSW_SP_RESOURCE_RIF_MAC_PROFILES);
        WARN_ON(!idr_is_empty(&mlxsw_sp->router->rif_mac_profiles_idr));