ARM: dts: ux500: Add alternative SDI pin configs

SDI0/SDI1 can be used in configurations where some of the pins
(e.g. direction control) are not used. The pinctrl driver has
separate pin groups for them.

Add new pin configurations for:
  - mc0_a_2: like mc0_a_1, but without CMDDIR/DAT0DIR/DAT2DIR
  - mc1_a_2: like mc1_a_1, but without FBCLK

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-3-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi b/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi
index b3ef91b98207c23d0b01961a1356d51549f2cf31..b6d0a60e9aede729e43952e41c4f84b283da97a7 100644 (file)
--- a/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi
@@ -257,6 +257,47 @@
                                ste,config = <&slpm_out_lo_wkup_pdis>;
                        };
                };
+
+               mc0_a_2_default: mc0_a_2_default {
+                       default_mux {
+                               function = "mc0";
+                               groups = "mc0_a_2";
+                       };
+                       default_cfg1 {
+                               pins = "GPIO22_AA3"; /* FBCLK */
+                               ste,config = <&in_nopull>;
+                       };
+                       default_cfg2 {
+                               pins = "GPIO23_AA4"; /* CLK */
+                               ste,config = <&out_lo>;
+                       };
+                       default_cfg3 {
+                               pins =
+                               "GPIO24_AB2", /* CMD */
+                               "GPIO25_Y4", /* DAT0 */
+                               "GPIO26_Y2", /* DAT1 */
+                               "GPIO27_AA2", /* DAT2 */
+                               "GPIO28_AA1"; /* DAT3 */
+                               ste,config = <&in_pu>;
+                       };
+               };
+
+               mc0_a_2_sleep: mc0_a_2_sleep {
+                       sleep_cfg1 {
+                               pins =
+                               "GPIO22_AA3", /* FBCLK */
+                               "GPIO24_AB2", /* CMD */
+                               "GPIO25_Y4", /* DAT0 */
+                               "GPIO26_Y2", /* DAT1 */
+                               "GPIO27_AA2", /* DAT2 */
+                               "GPIO28_AA1"; /* DAT3 */
+                               ste,config = <&slpm_in_wkup_pdis>;
+                       };
+                       sleep_cfg2 {
+                               pins = "GPIO23_AA4"; /* CLK */
+                               ste,config = <&slpm_out_lo_wkup_pdis>;
+                       };
+               };
        };
 
        sdi1 {
@@ -301,6 +342,42 @@
                                ste,config = <&slpm_in_wkup_pdis>;
                        };
                };
+
+               mc1_a_2_default: mc1_a_2_default {
+                       default_mux {
+                               function = "mc1";
+                               groups = "mc1_a_2";
+                       };
+                       default_cfg1 {
+                               pins = "GPIO208_AH16"; /* CLK */
+                               ste,config = <&out_lo>;
+                       };
+                       default_cfg2 {
+                               pins =
+                               "GPIO210_AJ15", /* CMD */
+                               "GPIO211_AG14", /* DAT0 */
+                               "GPIO212_AF13", /* DAT1 */
+                               "GPIO213_AG13", /* DAT2 */
+                               "GPIO214_AH15"; /* DAT3 */
+                               ste,config = <&in_pu>;
+                       };
+               };
+
+               mc1_a_2_sleep: mc1_a_2_sleep {
+                       sleep_cfg1 {
+                               pins = "GPIO208_AH16"; /* CLK */
+                               ste,config = <&slpm_out_lo_wkup_pdis>;
+                       };
+                       sleep_cfg2 {
+                               pins =
+                               "GPIO210_AJ15", /* CMD */
+                               "GPIO211_AG14", /* DAT0 */
+                               "GPIO212_AF13", /* DAT1 */
+                               "GPIO213_AG13", /* DAT2 */
+                               "GPIO214_AH15"; /* DAT3 */
+                               ste,config = <&slpm_in_wkup_pdis>;
+                       };
+               };
        };
 
        sdi2 {