drm/amdgpu: store userq_managers in a list in adev

So we can iterate across them when we need to manage
all user queues.

v2: add uq_mgr to adev list in amdgpu_userq_mgr_init

Reviewed-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3cdb5f8325aa63e4bd50fd329b6e0fa43d28a94f..f88a04b1c4cef9de4508b902cf807cc067a3b99f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1237,6 +1237,9 @@ struct amdgpu_device {
         * in KFD: VRAM or GTT.
         */
        bool                            apu_prefer_gtt;
+
+       struct list_head                userq_mgr_list;
+       struct mutex                    userq_mutex;
 };
 
 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4da18ed0beeaec6d665f5f8387df48408302fe45..6b38b0511330e4dc9807a0a6ca60126180237bcd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4317,6 +4317,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        mutex_init(&adev->gfx.kfd_sch_mutex);
        mutex_init(&adev->gfx.workload_profile_mutex);
        mutex_init(&adev->vcn.workload_profile_mutex);
+       mutex_init(&adev->userq_mutex);
 
        amdgpu_device_init_apu_flags(adev);
 
@@ -4344,6 +4345,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
        INIT_LIST_HEAD(&adev->pm.od_kobj_list);
 
+       INIT_LIST_HEAD(&adev->userq_mgr_list);
+
        INIT_DELAYED_WORK(&adev->delayed_init_work,
                          amdgpu_device_delayed_init_work_handler);
        INIT_DELAYED_WORK(&adev->gfx.gfx_off_delay_work,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index beae931152a3cdd1fd7421168a514a6972d041f6..ecd49cf15b2a90adc7f9fa1b715b07269afce687 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
@@ -658,20 +658,34 @@ int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct amdgpu_devi
        idr_init_base(&userq_mgr->userq_idr, 1);
        userq_mgr->adev = adev;
 
+       mutex_lock(&adev->userq_mutex);
+       list_add(&userq_mgr->list, &adev->userq_mgr_list);
+       mutex_unlock(&adev->userq_mutex);
+
        INIT_DELAYED_WORK(&userq_mgr->resume_work, amdgpu_userqueue_resume_worker);
        return 0;
 }
 
 void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr)
 {
-       uint32_t queue_id;
+       struct amdgpu_device *adev = userq_mgr->adev;
        struct amdgpu_usermode_queue *queue;
+       struct amdgpu_userq_mgr *uqm, *tmp;
+       uint32_t queue_id;
 
        cancel_delayed_work(&userq_mgr->resume_work);
 
        mutex_lock(&userq_mgr->userq_mutex);
        idr_for_each_entry(&userq_mgr->userq_idr, queue, queue_id)
                amdgpu_userqueue_cleanup(userq_mgr, queue, queue_id);
+       mutex_lock(&adev->userq_mutex);
+       list_for_each_entry_safe(uqm, tmp, &adev->userq_mgr_list, list) {
+               if (uqm == userq_mgr) {
+                       list_del(&uqm->list);
+                       break;
+               }
+       }
+       mutex_unlock(&adev->userq_mutex);
        idr_destroy(&userq_mgr->userq_idr);
        mutex_unlock(&userq_mgr->userq_mutex);
        mutex_destroy(&userq_mgr->userq_mutex);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h
index 0f358f77f2d9bd452c8f446c11123723a31ff0f3..ec1a4ca6f632196d7d41c63c93d4a54752896d3e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.h
@@ -76,6 +76,7 @@ struct amdgpu_userq_mgr {
        struct mutex                    userq_mutex;
        struct amdgpu_device            *adev;
        struct delayed_work             resume_work;
+       struct list_head                list;
 };
 
 struct amdgpu_db_info {