clk: exynos5433: Add documentation for the audio block parent clocks
authorMarek Szyprowski <m.szyprowski@samsung.com>
Thu, 17 Nov 2016 11:42:53 +0000 (12:42 +0100)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 17 Nov 2016 12:58:49 +0000 (13:58 +0100)
Audio block requires access to two parent clocks: audio PLL and oscillator,
so add this information to device tree bindings documentation.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Documentation/devicetree/bindings/clock/exynos5433-clock.txt

index ffff67a0e9cdf63e3d3fc1f212e3bef86b3e4da7..1dc80f8811fe8ba03b13c1180301a255983d33ad 100644 (file)
@@ -104,6 +104,10 @@ Required Properties:
                - sclk_decon_tv_vclk_disp
                - aclk_disp_333
 
+       Input clocks for audio clock controller:
+               - oscclk
+               - fout_aud_pll
+
        Input clocks for bus0 clock controller:
                - aclk_bus0_400
 
@@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below.
                compatible = "samsung,exynos5433-cmu-aud";
                reg = <0x114c0000 0x0b04>;
                #clock-cells = <1>;
+
+               clock-names = "oscclk", "fout_aud_pll";
+               clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
        };
 
        cmu_bus0: clock-controller@13600000 {