drm/amd/display: Enable DCLK_DS from driver by default
authorMuhammad Ahmed <ahmed.ahmed@amd.com>
Thu, 3 Aug 2023 18:23:57 +0000 (14:23 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Sep 2023 20:24:07 +0000 (16:24 -0400)
PMFW ungate this feature, this can be enabled now

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c

index 8d870880ec15a7239a1c67c512ed8d79f8de0dd1..9bd1e86901ec9f051c4a334e4a327bdd98857629 100644 (file)
@@ -230,9 +230,6 @@ int dcn35_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int re
 {
        int actual_min_ds_dcfclk_mhz = -1;
 
-       if (!clk_mgr->base.ctx->dc->debug.pstate_enabled)
-               return -1;
-
        if (!clk_mgr->smu_present)
                return requested_min_ds_dcfclk_khz;