ath9k_hw: fill in the callbacks for calibration for AR9003
authorLuis R. Rodriguez <lrodriguez@atheros.com>
Thu, 15 Apr 2010 21:39:10 +0000 (17:39 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 16 Apr 2010 19:43:35 +0000 (15:43 -0400)
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9002_calib.c
drivers/net/wireless/ath/ath9k/ar9003_calib.c
drivers/net/wireless/ath/ath9k/calib.h

index cd234aafaa4a28b51989fc383f2d99b5b11f6b5e..968529b3988fe42e6e80da4e195c0d5ab336745f 100644 (file)
@@ -50,6 +50,8 @@ static void ar9002_hw_setup_calibration(struct ath_hw *ah,
                ath_print(common, ATH_DBG_CALIBRATE,
                          "starting Init ADC DC Calibration\n");
                break;
+       case TEMP_COMP_CAL:
+               break; /* Not supported */
        }
 
        REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
index cd80a43ffcffd160a52935eedd3418ffbe92279e..f0e8f639ecfd4646f2e2efa9d99752ebc5391568 100644 (file)
 static void ar9003_hw_setup_calibration(struct ath_hw *ah,
                                        struct ath9k_cal_list *currCal)
 {
-       /* TODO */
+       struct ath_common *common = ath9k_hw_common(ah);
+
+       /* Select calibration to run */
+       switch (currCal->calData->calType) {
+       case IQ_MISMATCH_CAL:
+               /*
+                * Start calibration with
+                * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
+                */
+               REG_RMW_FIELD(ah, AR_PHY_TIMING4,
+                             AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
+               currCal->calData->calCountMax);
+               REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
+
+               ath_print(common, ATH_DBG_CALIBRATE,
+                         "starting IQ Mismatch Calibration\n");
+
+               /* Kick-off cal */
+               REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
+               break;
+       case TEMP_COMP_CAL:
+               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
+                             AR_PHY_65NM_CH0_THERM_LOCAL, 1);
+               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
+                             AR_PHY_65NM_CH0_THERM_START, 1);
+
+               ath_print(common, ATH_DBG_CALIBRATE,
+                         "starting Temperature Compensation Calibration\n");
+               break;
+       case ADC_DC_INIT_CAL:
+       case ADC_GAIN_CAL:
+       case ADC_DC_CAL:
+               /* Not yet */
+               break;
+       }
 }
 
 static bool ar9003_hw_calibrate(struct ath_hw *ah,
index 25828e89e7c796c6ad3a7adc36e29ec0b3c1b621..24538bdb9126c9239402206275bdbefddb1a4451 100644 (file)
@@ -68,7 +68,8 @@ enum ath9k_cal_types {
        ADC_DC_INIT_CAL = 0x1,
        ADC_GAIN_CAL = 0x2,
        ADC_DC_CAL = 0x4,
-       IQ_MISMATCH_CAL = 0x8
+       IQ_MISMATCH_CAL = 0x8,
+       TEMP_COMP_CAL = 0x10,
 };
 
 enum ath9k_cal_state {