drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses
authorImre Deak <imre.deak@intel.com>
Thu, 21 Apr 2022 16:22:21 +0000 (19:22 +0300)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tue, 26 Apr 2022 07:12:32 +0000 (10:12 +0300)
Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address.

Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v5.9+
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220421162221.2261895-1-imre.deak@intel.com
(cherry picked from commit af2cbc6ef967f61711a3c40fca5366ea0bc7fecc)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/i915_reg.h

index 7748f7f20b95378f4ae83d12a97630af8e117680..a9354f8f110d8f1c2f029c3bad9fce9fca7a3a8b 100644 (file)
 #define _SEL_FETCH_PLANE_BASE_6_A              0x70940
 #define _SEL_FETCH_PLANE_BASE_7_A              0x70960
 #define _SEL_FETCH_PLANE_BASE_CUR_A            0x70880
-#define _SEL_FETCH_PLANE_BASE_1_B              0x70990
+#define _SEL_FETCH_PLANE_BASE_1_B              0x71890
 
 #define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \
                                             _SEL_FETCH_PLANE_BASE_1_A, \