arm64: Add missing APTable and TCR_ELx.HPD masks
authorMarc Zyngier <maz@kernel.org>
Tue, 18 Jun 2024 09:09:18 +0000 (10:09 +0100)
committerMarc Zyngier <maz@kernel.org>
Fri, 30 Aug 2024 11:04:19 +0000 (12:04 +0100)
Although Linux doesn't make use of hierarchical permissions (TFFT!),
KVM needs to know where the various bits related to this feature
live in the TCR_ELx registers as well as in the page tables.

Add the missing bits.

Signed-off-by: Marc Zyngier <maz@kernel.org>
arch/arm64/include/asm/kvm_arm.h
arch/arm64/include/asm/pgtable-hwdef.h

index d81cc746e0ebd046fad4fc25fdff13f7bdc19c54..109a85ee691007284a22588941d48adcba7a1c49 100644 (file)
 /* TCR_EL2 Registers bits */
 #define TCR_EL2_DS             (1UL << 32)
 #define TCR_EL2_RES1           ((1U << 31) | (1 << 23))
+#define TCR_EL2_HPD            (1 << 24)
 #define TCR_EL2_TBI            (1 << 20)
 #define TCR_EL2_PS_SHIFT       16
 #define TCR_EL2_PS_MASK                (7 << TCR_EL2_PS_SHIFT)
index 1f60aa1bc750cb6485e9b407fbc9b78ee1f50d38..07dfbdb14babbdf346073bc9e66840d5fdcd1d48 100644 (file)
  */
 #define PTE_S2_MEMATTR(t)      (_AT(pteval_t, (t)) << 2)
 
+/*
+ * Hierarchical permission for Stage-1 tables
+ */
+#define S1_TABLE_AP            (_AT(pmdval_t, 3) << 61)
+
 /*
  * Highest possible physical address supported.
  */
 #define TCR_TBI1               (UL(1) << 38)
 #define TCR_HA                 (UL(1) << 39)
 #define TCR_HD                 (UL(1) << 40)
+#define TCR_HPD0_SHIFT         41
+#define TCR_HPD0               (UL(1) << TCR_HPD0_SHIFT)
+#define TCR_HPD1_SHIFT         42
+#define TCR_HPD1               (UL(1) << TCR_HPD1_SHIFT)
 #define TCR_TBID0              (UL(1) << 51)
 #define TCR_TBID1              (UL(1) << 52)
 #define TCR_NFD0               (UL(1) << 53)