ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250

Add nodes for GPU (Mali 400) to Exynos3250.  This is still limited and
not tested:
1. No dynamic voltage and frequency scaling,
2. Not sure what to do with CLK_G3D clock responsible for gating entire
   IP block (it is now being disabled as unused).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
index ace50e194a455e93b89c8aa15349d0c182ccd762..dee35e3a5c4ba850b3d6072835467557162b4200 100644 (file)
--- a/arch/arm/boot/dts/exynos3250-artik5.dtsi
+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
@@ -59,6 +59,11 @@
        cpu0-supply = <&buck2_reg>;
 };
 
+&gpu {
+       mali-supply = <&buck3_reg>;
+       status = "okay";
+};
+
 &i2c_0 {
        #address-cells = <1>;
        #size-cells = <0>;

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index e25765500e99f0d520b64bfbae7785bb5b5ab563..248bd372fe705109597f0e19534083359c58c627 100644 (file)
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -172,6 +172,11 @@
        status = "okay";
 };
 
+&gpu {
+       mali-supply = <&buck3_reg>;
+       status = "okay";
+};
+
 &hsotg {
        vusb_d-supply = <&ldo15_reg>;
        vusb_a-supply = <&ldo12_reg>;

diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index 7479993755dacbebfc4f9efc4a593e3a84b96ef2..86c26a4edfd72c54e05413052216ceb4e90a15ad 100644 (file)
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -244,6 +244,11 @@
        };
 };
 
+&gpu {
+       mali-supply = <&buck3_reg>;
+       status = "okay";
+};
+
 &i2c_0 {
        #address-cells = <1>;
        #size-cells = <0>;

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 8ce3a7786b19808c74ab7996b24cf27ab6d1d4c2..c17870a54acf1c4c2dbe5422361f7ff8d8a43060 100644 (file)
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -126,6 +126,39 @@
                };
        };
 
+       gpu: gpu@13000000 {
+               compatible = "samsung,exynos4210-mali", "arm,mali-400";
+               reg = <0x13000000 0x10000>;
+               interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "gp",
+                                 "gpmmu",
+                                 "pp0",
+                                 "ppmmu0",
+                                 "pp1",
+                                 "ppmmu1",
+                                 "pp2",
+                                 "ppmmu2",
+                                 "pp3",
+                                 "ppmmu3",
+                                 "pmu";
+               clocks = <&cmu CLK_G3D>,
+                        <&cmu CLK_SCLK_G3D>;
+               clock-names = "bus", "core";
+               power-domains = <&pd_g3d>;
+               status = "disabled";
+               /* TODO: operating points for DVFS, assigned clock as 134 MHz */
+       };
+
        pmu {
                compatible = "arm,cortex-a7-pmu";
                interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,