MIPS: mipsmtregs: Fix target register for MFTC0
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Sun, 16 Jun 2024 13:25:02 +0000 (14:25 +0100)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Fri, 21 Jun 2024 08:16:15 +0000 (10:16 +0200)
Target register of mftc0 should be __res instead of $1, this is
a leftover from old .insn code.

Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers")
Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/mipsmtregs.h

index 30e86861c206ce2a2d2aeaaf047ab6aa98c8df12..b1ee3c48e84baf604ee48ded9f4121a0926666bc 100644 (file)
@@ -322,7 +322,7 @@ static inline void ehb(void)
        "       .set    push                            \n"     \
        "       .set    "MIPS_ISA_LEVEL"                \n"     \
        _ASM_SET_MFTC0                                                  \
-       "       mftc0   $1, " #rt ", " #sel "           \n"     \
+       "       mftc0   %0, " #rt ", " #sel "           \n"     \
        _ASM_UNSET_MFTC0                                                \
        "       .set    pop                             \n"     \
        : "=r" (__res));                                                \