drm/amd/display: Don't pass HostVM by default on DCN3.1
authorMichael Strauss <michael.strauss@amd.com>
Tue, 5 Apr 2022 19:56:04 +0000 (15:56 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Apr 2022 21:10:36 +0000 (17:10 -0400)
[WHY]
Roll back previous change to stop passing this value by default, instead
add a debug flag to override to previous behaviour (or force HostVM calcs)

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

index 5c85e52e5406169c810c67baffa056f6a9c33e12..78b9df7765034eca756e0abebc213d351e95f360 100644 (file)
@@ -359,6 +359,12 @@ enum dc_psr_power_opts {
        psr_power_opt_ds_disable_allow = 0x100,
 };
 
+enum dml_hostvm_override_opts {
+       DML_HOSTVM_NO_OVERRIDE = 0x0,
+       DML_HOSTVM_OVERRIDE_FALSE = 0x1,
+       DML_HOSTVM_OVERRIDE_TRUE = 0x2,
+};
+
 enum dcc_option {
        DCC_ENABLE = 0,
        DCC_DISABLE = 1,
@@ -733,6 +739,7 @@ struct dc_debug_options {
        bool extended_blank_optimization;
        union aux_wake_wa_options aux_wake_wa;
        uint8_t psr_power_use_phy_fsm;
+       enum dml_hostvm_override_opts dml_hostvm_override;
 };
 
 struct gpu_info_soc_bounding_box_v1_0;
index 5b3f0c2dfb55ad3905f0b318996744da19d444c5..d3edc9d11d88b3357eb5be3d6abadb296fa554dd 100644 (file)
@@ -890,6 +890,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .enable_sw_cntl_psr = true,
        .apply_vendor_specific_lttpr_wa = true,
        .enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/
+       .dml_hostvm_override = DML_HOSTVM_OVERRIDE_FALSE,
 };
 
 static const struct dc_debug_options debug_defaults_diags = {
@@ -1666,7 +1667,6 @@ int dcn31_populate_dml_pipes_from_context(
                 * intermittently experienced depending on peak b/w requirements.
                 */
                pipes[pipe_cnt].pipe.src.immediate_flip = true;
-
                pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
                pipes[pipe_cnt].pipe.src.gpuvm = true;
                pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
@@ -1675,6 +1675,13 @@ int dcn31_populate_dml_pipes_from_context(
                pipes[pipe_cnt].pipe.src.dcc_rate = 3;
                pipes[pipe_cnt].dout.dsc_input_bpc = 0;
 
+               if (dc->debug.dml_hostvm_override == DML_HOSTVM_NO_OVERRIDE)
+                       pipes[pipe_cnt].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active;
+               else if (dc->debug.dml_hostvm_override == DML_HOSTVM_OVERRIDE_FALSE)
+                       pipes[pipe_cnt].pipe.src.hostvm = false;
+               else if (dc->debug.dml_hostvm_override == DML_HOSTVM_OVERRIDE_TRUE)
+                       pipes[pipe_cnt].pipe.src.hostvm = true;
+
                if (pipes[pipe_cnt].dout.dsc_enable) {
                        switch (timing->display_color_depth) {
                        case COLOR_DEPTH_888: