rt2x00: rework RT chipset and revision determination for PCI an SOC devices.
authorGertjan van Wingerde <gwingerde@gmail.com>
Sat, 13 Feb 2010 19:55:49 +0000 (20:55 +0100)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 15 Feb 2010 21:14:11 +0000 (16:14 -0500)
The recent rt2800 devices are no longer really identified by their PCI
ID's, but rather by the contents of their CSR0 register. Also for the
other chipsets is the contents of this CSR0 register important.
Change the chipset determination logic to be more aligned with the rt2800
model.
Preparation for the support of rt3070 / rt3090 based devices.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
14 files changed:
drivers/net/wireless/rt2x00/rt2400pci.c
drivers/net/wireless/rt2x00/rt2400pci.h
drivers/net/wireless/rt2x00/rt2500pci.c
drivers/net/wireless/rt2x00/rt2500pci.h
drivers/net/wireless/rt2x00/rt2500usb.c
drivers/net/wireless/rt2x00/rt2800.h
drivers/net/wireless/rt2x00/rt2800lib.c
drivers/net/wireless/rt2x00/rt2800usb.c
drivers/net/wireless/rt2x00/rt2x00.h
drivers/net/wireless/rt2x00/rt2x00debug.c
drivers/net/wireless/rt2x00/rt61pci.c
drivers/net/wireless/rt2x00/rt61pci.h
drivers/net/wireless/rt2x00/rt73usb.c
drivers/net/wireless/rt2x00/rt73usb.h

index 9207b9b100b0c84848f9f340371dabe29870deba..676814d3a81bd305b76882a8e91e329bd58757f3 100644 (file)
@@ -1327,7 +1327,6 @@ static int rt2400pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
 {
        u32 reg;
-       u16 chip;
        u16 value;
        u16 eeprom;
 
@@ -1336,17 +1335,13 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
         */
        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
 
-       /*
-        * Identify RT chipset.
-        */
-       pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
-
        /*
         * Identify RF chipset.
         */
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
-       rt2x00_set_chip(rt2x00dev, chip, value, reg);
+       rt2x00_set_chip(rt2x00dev, RT2460, value,
+                       rt2x00_get_field32(reg, CSR0_REVISION));
 
        if (!rt2x00_rf(rt2x00dev, RF2420) && !rt2x00_rf(rt2x00dev, RF2421)) {
                ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
index 6c21ef66dfe0c2fc52dce0dd846582379ce99795..606137738848a6157e5fd542e84f7b0131a19f5e 100644 (file)
@@ -65,6 +65,7 @@
  * CSR0: ASIC revision number.
  */
 #define CSR0                           0x0000
+#define CSR0_REVISION                  FIELD32(0x0000ffff)
 
 /*
  * CSR1: System control register.
index 0f6d001267ac2ba2b85fb026747f63699e3253ec..c71266142ae9fafb0a0719bbecba6d43beb7ebfe 100644 (file)
@@ -1490,7 +1490,6 @@ static int rt2500pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
 {
        u32 reg;
-       u16 chip;
        u16 value;
        u16 eeprom;
 
@@ -1499,17 +1498,13 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
         */
        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
 
-       /*
-        * Identify RT chipset.
-        */
-       pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
-
        /*
         * Identify RF chipset.
         */
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
-       rt2x00_set_chip(rt2x00dev, chip, value, reg);
+       rt2x00_set_chip(rt2x00dev, RT2560, value,
+                       rt2x00_get_field32(reg, CSR0_REVISION));
 
        if (!rt2x00_rf(rt2x00dev, RF2522) &&
            !rt2x00_rf(rt2x00dev, RF2523) &&
index b0075674c09bab2514fe4c388eee2beeca0380ae..6471f8e74b35d021b344e17be6d6ca035f75023d 100644 (file)
@@ -76,6 +76,7 @@
  * CSR0: ASIC revision number.
  */
 #define CSR0                           0x0000
+#define CSR0_REVISION                  FIELD32(0x0000ffff)
 
 /*
  * CSR1: System control register.
index 99b7cb88a648dd161c9589340c4c85b6d12640d5..ee34c137e7cdf45cdaafdb33d63511ee9bb428b0 100644 (file)
@@ -1409,8 +1409,7 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
        rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
        rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
 
-       if (!rt2x00_check_rev(rt2x00dev, 0x000ffff0, 0) ||
-           rt2x00_check_rev(rt2x00dev, 0x0000000f, 0)) {
+       if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
                ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
                return -ENODEV;
        }
index 1a7eae357fef937efbc7e65429f763bf6fb83b32..74c0433dba3788659ff9ccfc1c5060cb7387282c 100644 (file)
 /*
  * Chipset version.
  */
-#define RT2860C_VERSION                        0x28600100
-#define RT2860D_VERSION                        0x28600101
-#define RT2880E_VERSION                        0x28720200
-#define RT2883_VERSION                 0x28830300
-#define RT3070_VERSION                 0x30700200
+#define RT2860C_VERSION                        0x0100
+#define RT2860D_VERSION                        0x0101
+#define RT2880E_VERSION                        0x0200
+#define RT2883_VERSION                 0x0300
+#define RT3070_VERSION                 0x0200
 
 /*
  * Signal information.
  * ASIC_VER: 2860 or 2870
  */
 #define MAC_CSR0                       0x1000
-#define MAC_CSR0_ASIC_REV              FIELD32(0x0000ffff)
-#define MAC_CSR0_ASIC_VER              FIELD32(0xffff0000)
+#define MAC_CSR0_REVISION              FIELD32(0x0000ffff)
+#define MAC_CSR0_CHIPSET               FIELD32(0xffff0000)
 
 /*
  * MAC_SYS_CTRL:
index 7340e487df6b1a50e58e238d1cac0ddaaab053e6..18d4d8e4ae6ba587734574b2095cc435a7fd5e49 100644 (file)
@@ -898,7 +898,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
        rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
        rt2800_bbp_write(rt2x00dev, 3, bbp);
 
-       if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) {
+       if (rt2x00_rt(rt2x00dev, RT2860) &&
+           (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
                if (conf_is_ht40(conf)) {
                        rt2800_bbp_write(rt2x00dev, 69, 0x1a);
                        rt2800_bbp_write(rt2x00dev, 70, 0x0a);
@@ -1061,7 +1062,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
 {
        if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
                if (rt2x00_is_usb(rt2x00dev) &&
-                   rt2x00_rev(rt2x00dev) == RT3070_VERSION)
+                   rt2x00_rt(rt2x00dev, RT3070) &&
+                   (rt2x00_rev(rt2x00dev) == RT3070_VERSION))
                        return 0x1c + (2 * rt2x00dev->lna_gain);
                else
                        return 0x2e + rt2x00dev->lna_gain;
@@ -1092,7 +1094,8 @@ EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
 void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
                       const u32 count)
 {
-       if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)
+       if (rt2x00_rt(rt2x00dev, RT2860) &&
+           (rt2x00_rev(rt2x00dev) == RT2860C_VERSION))
                return;
 
        /*
@@ -1178,7 +1181,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
        rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
        if (rt2x00_is_usb(rt2x00dev) &&
-           rt2x00_rev(rt2x00dev) == RT3070_VERSION) {
+           rt2x00_rt(rt2x00dev, RT3070) &&
+           (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
                rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
                rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
                rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -1205,8 +1209,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
 
        rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
        rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
-       if (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION &&
-           rt2x00_rev(rt2x00dev) < RT3070_VERSION)
+       if ((rt2x00_rt(rt2x00dev, RT2872) &&
+            (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
+           rt2x00_rt(rt2x00dev, RT2880) ||
+           rt2x00_rt(rt2x00dev, RT2883) ||
+           rt2x00_rt(rt2x00dev, RT2890) ||
+           rt2x00_rt(rt2x00dev, RT3052) ||
+           (rt2x00_rt(rt2x00dev, RT3070) &&
+            (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
                rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
        else
                rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
@@ -1485,16 +1495,19 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
        rt2800_bbp_write(rt2x00dev, 103, 0x00);
        rt2800_bbp_write(rt2x00dev, 105, 0x05);
 
-       if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) {
+       if (rt2x00_rt(rt2x00dev, RT2860) &&
+           (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
                rt2800_bbp_write(rt2x00dev, 69, 0x16);
                rt2800_bbp_write(rt2x00dev, 73, 0x12);
        }
 
-       if (rt2x00_rev(rt2x00dev) > RT2860D_VERSION)
+       if (rt2x00_rt(rt2x00dev, RT2860) &&
+           (rt2x00_rev(rt2x00dev) > RT2860D_VERSION))
                rt2800_bbp_write(rt2x00dev, 84, 0x19);
 
        if (rt2x00_is_usb(rt2x00dev) &&
-           rt2x00_rev(rt2x00dev) == RT3070_VERSION) {
+           rt2x00_rt(rt2x00dev, RT3070) &&
+           (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
                rt2800_bbp_write(rt2x00dev, 70, 0x0a);
                rt2800_bbp_write(rt2x00dev, 84, 0x99);
                rt2800_bbp_write(rt2x00dev, 105, 0x05);
@@ -1586,7 +1599,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
        u8 bbp;
 
        if (rt2x00_is_usb(rt2x00dev) &&
-           rt2x00_rev(rt2x00dev) != RT3070_VERSION)
+           rt2x00_rt(rt2x00dev, RT3070) &&
+           (rt2x00_rev(rt2x00dev) != RT3070_VERSION))
                return 0;
 
        if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
@@ -1757,7 +1771,12 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
                rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
                rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
                EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
-       } else if (rt2x00_rev(rt2x00dev) < RT2883_VERSION) {
+       } else if (rt2x00_rt(rt2x00dev, RT2860) ||
+                  rt2x00_rt(rt2x00dev, RT2870) ||
+                  rt2x00_rt(rt2x00dev, RT2872) ||
+                  rt2x00_rt(rt2x00dev, RT2880) ||
+                  (rt2x00_rt(rt2x00dev, RT2883) &&
+                   (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
                /*
                 * There is a max of 2 RX streams for RT28x0 series
                 */
@@ -1842,7 +1861,6 @@ EXPORT_SYMBOL_GPL(rt2800_validate_eeprom);
 int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
 {
        u32 reg;
-       u16 chip;
        u16 value;
        u16 eeprom;
 
@@ -1857,41 +1875,25 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
 
-       if (rt2x00_is_pci(rt2x00dev)) {
-#if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE)
-               pci_read_config_word(to_pci_dev(rt2x00dev->dev),
-                                    PCI_DEVICE_ID,
-                                    &chip);
-#else
-               BUG();
-#endif
-       } else if (rt2x00_is_usb(rt2x00dev)) {
-               /*
-                * The check for rt2860 is not a typo, some rt2870 hardware
-                * identifies itself as rt2860 in the CSR register.
-                */
-               if (((reg & 0xfff00000) == 0x28600000) ||
-                   ((reg & 0xfff00000) == 0x28700000) ||
-                   ((reg & 0xfff00000) == 0x28800000)) {
-                       chip = RT2870;
-               } else if ((reg & 0xffff0000) == 0x30700000) {
-                       chip = RT3070;
-               } else {
-                       ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
-                       return -ENODEV;
-               }
-       } else if (rt2x00_is_soc(rt2x00dev)) {
-#if defined(CONFIG_RALINK_RT288X)
-               chip = RT2880;
-#elif defined(CONFIG_RALINK_RT305X)
-               chip = RT3052;
-#else
-               BUG();
-#endif
+       rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
+                       value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
+
+       if (!rt2x00_rt(rt2x00dev, RT2860) &&
+           !rt2x00_rt(rt2x00dev, RT2870) &&
+           !rt2x00_rt(rt2x00dev, RT2872) &&
+           !rt2x00_rt(rt2x00dev, RT2880) &&
+           !rt2x00_rt(rt2x00dev, RT2883) &&
+           !rt2x00_rt(rt2x00dev, RT2890) &&
+           !rt2x00_rt(rt2x00dev, RT3052) &&
+           !rt2x00_rt(rt2x00dev, RT3070) &&
+           !rt2x00_rt(rt2x00dev, RT3071) &&
+           !rt2x00_rt(rt2x00dev, RT3090) &&
+           !rt2x00_rt(rt2x00dev, RT3390) &&
+           !rt2x00_rt(rt2x00dev, RT3572)) {
+               ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
+               return -ENODEV;
        }
 
-       rt2x00_set_chip(rt2x00dev, chip, value, reg);
-
        if (!rt2x00_rf(rt2x00dev, RF2820) &&
            !rt2x00_rf(rt2x00dev, RF2850) &&
            !rt2x00_rf(rt2x00dev, RF2720) &&
index 82755cf8b73e015e979406bd2b37f09f5cabfcc3..79ea3798d597f57b27a7aca00cbf418fe29ba9c7 100644 (file)
@@ -92,7 +92,6 @@ static bool rt2800usb_check_crc(const u8 *data, const size_t len)
 static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
                                    const u8 *data, const size_t len)
 {
-       u16 chipset = (rt2x00_rev(rt2x00dev) >> 16) & 0xffff;
        size_t offset = 0;
 
        /*
@@ -111,9 +110,9 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
         * Check if we need the upper 4kb firmware data or not.
         */
        if ((len == 4096) &&
-           (chipset != 0x2860) &&
-           (chipset != 0x2872) &&
-           (chipset != 0x3070))
+           !rt2x00_rt(rt2x00dev, RT2860) &&
+           !rt2x00_rt(rt2x00dev, RT2872) &&
+           !rt2x00_rt(rt2x00dev, RT3070))
                return FW_BAD_VERSION;
 
        /*
@@ -138,14 +137,13 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
        u32 reg;
        u32 offset;
        u32 length;
-       u16 chipset = (rt2x00_rev(rt2x00dev) >> 16) & 0xffff;
 
        /*
         * Check which section of the firmware we need.
         */
-       if ((chipset == 0x2860) ||
-           (chipset == 0x2872) ||
-           (chipset == 0x3070)) {
+       if (rt2x00_rt(rt2x00dev, RT2860) ||
+           rt2x00_rt(rt2x00dev, RT2872) ||
+           rt2x00_rt(rt2x00dev, RT3070)) {
                offset = 0;
                length = 4096;
        } else {
@@ -200,9 +198,9 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
         */
        rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
 
-       if ((chipset == 0x3070) ||
-           (chipset == 0x3071) ||
-           (chipset == 0x3572)) {
+       if (rt2x00_rt(rt2x00dev, RT3070) ||
+           rt2x00_rt(rt2x00dev, RT3071) ||
+           rt2x00_rt(rt2x00dev, RT3572)) {
                udelay(200);
                rt2800_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
                udelay(10);
index 1fed90acd198e9bdc4103805459ce24cb980fc97..d9daa9c406fadf2d914dab71f89313ba5636e51a 100644 (file)
@@ -170,25 +170,26 @@ enum rt2x00_chip_intf {
  */
 struct rt2x00_chip {
        u16 rt;
-#define RT2460         0x0101
-#define RT2560         0x0201
-#define RT2570         0x1201
-#define RT2561s                0x0301  /* Turbo */
-#define RT2561         0x0302
-#define RT2661         0x0401
-#define RT2571         0x1300
-#define RT2860         0x0601  /* 2.4GHz PCI/CB */
-#define RT2860D                0x0681  /* 2.4GHz, 5GHz PCI/CB */
-#define RT2890         0x0701  /* 2.4GHz PCIe */
-#define RT2890D                0x0781  /* 2.4GHz, 5GHz PCIe */
+#define RT2460         0x2460
+#define RT2560         0x2560
+#define RT2570         0x2570
+#define RT2661         0x2661
+#define RT2573         0x2573
+#define RT2860         0x2860  /* 2.4GHz PCI/CB */
+#define RT2870         0x2870
+#define RT2872         0x2872
 #define RT2880         0x2880  /* WSOC */
+#define RT2883         0x2883  /* WSOC */
+#define RT2890         0x2890  /* 2.4GHz PCIe */
 #define RT3052         0x3052  /* WSOC */
+#define RT3070         0x3070
+#define RT3071         0x3071
 #define RT3090         0x3090  /* 2.4GHz PCIe */
-#define RT2870         0x1600
-#define RT3070         0x1800
+#define RT3390         0x3390
+#define RT3572         0x3572
 
        u16 rf;
-       u32 rev;
+       u16 rev;
 
        enum rt2x00_chip_intf intf;
 };
@@ -918,14 +919,14 @@ static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
  * Chipset handlers
  */
 static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
-                                  const u16 rt, const u16 rf, const u32 rev)
+                                  const u16 rt, const u16 rf, const u16 rev)
 {
        rt2x00dev->chip.rt = rt;
        rt2x00dev->chip.rf = rf;
        rt2x00dev->chip.rev = rev;
 
        INFO(rt2x00dev,
-            "Chipset detected - rt: %04x, rf: %04x, rev: %08x.\n",
+            "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n",
             rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev);
 }
 
@@ -939,17 +940,11 @@ static inline char rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
        return (rt2x00dev->chip.rf == rf);
 }
 
-static inline u32 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
+static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
 {
        return rt2x00dev->chip.rev;
 }
 
-static inline bool rt2x00_check_rev(struct rt2x00_dev *rt2x00dev,
-                                   const u32 mask, const u32 rev)
-{
-       return ((rt2x00dev->chip.rev & mask) == rev);
-}
-
 static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
                                        enum rt2x00_chip_intf intf)
 {
index 7d323a763b54014142bf8dc51a2f509621b14733..70c04c282efc0bf7f34cc60c7fcbbb32793d03d9 100644 (file)
@@ -184,7 +184,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
        dump_hdr->data_length = cpu_to_le32(skb->len);
        dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt);
        dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf);
-       dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev);
+       dump_hdr->chip_rev = cpu_to_le16(rt2x00dev->chip.rev);
        dump_hdr->type = cpu_to_le16(type);
        dump_hdr->queue_index = desc->entry->queue->qid;
        dump_hdr->entry_index = desc->entry->entry_idx;
@@ -573,7 +573,7 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name,
        blob->data = data;
        data += sprintf(data, "rt chip:\t%04x\n", intf->rt2x00dev->chip.rt);
        data += sprintf(data, "rf chip:\t%04x\n", intf->rt2x00dev->chip.rf);
-       data += sprintf(data, "revision:\t%08x\n", intf->rt2x00dev->chip.rev);
+       data += sprintf(data, "revision:\t%04x\n", intf->rt2x00dev->chip.rev);
        data += sprintf(data, "\n");
        data += sprintf(data, "register\tbase\twords\twordsize\n");
        data += sprintf(data, "csr\t%d\t%d\t%d\n",
index 4ca1d48fb737336556783b8d9b2396e103e74349..ee9c696fe1d42bdad59fe2bd451e56f03a7f0df3 100644 (file)
@@ -1131,16 +1131,18 @@ dynamic_cca_tune:
  */
 static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 {
+       u16 chip;
        char *fw_name;
 
-       switch (rt2x00dev->chip.rt) {
-       case RT2561:
+       pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
+       switch (chip) {
+       case RT2561_PCI_ID:
                fw_name = FIRMWARE_RT2561;
                break;
-       case RT2561s:
+       case RT2561s_PCI_ID:
                fw_name = FIRMWARE_RT2561s;
                break;
-       case RT2661:
+       case RT2661_PCI_ID:
                fw_name = FIRMWARE_RT2661;
                break;
        default:
@@ -2282,7 +2284,6 @@ static int rt61pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
 {
        u32 reg;
-       u16 chip;
        u16 value;
        u16 eeprom;
 
@@ -2291,17 +2292,13 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
         */
        rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
 
-       /*
-        * Identify RT chipset.
-        */
-       pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
-
        /*
         * Identify RF chipset.
         */
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
-       rt2x00_set_chip(rt2x00dev, chip, value, reg);
+       rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
+                       value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
 
        if (!rt2x00_rf(rt2x00dev, RF5225) &&
            !rt2x00_rf(rt2x00dev, RF5325) &&
index 6f33f7f5668cb3bb6c2763c059329ba1da5457ef..ab20c775882412bb5aaf264c37fbf77e41cb403a 100644 (file)
 #ifndef RT61PCI_H
 #define RT61PCI_H
 
+/*
+ * RT chip PCI IDs.
+ */
+#define RT2561s_PCI_ID                 0x0301
+#define RT2561_PCI_ID                  0x0302
+#define RT2661_PCI_ID                  0x0401
+
 /*
  * RF chip defines.
  */
@@ -225,6 +232,8 @@ struct hw_pairwise_ta_entry {
  * MAC_CSR0: ASIC revision number.
  */
 #define MAC_CSR0                       0x3000
+#define MAC_CSR0_REVISION              FIELD32(0x0000000f)
+#define MAC_CSR0_CHIPSET               FIELD32(0x000ffff0)
 
 /*
  * MAC_CSR1: System control register.
index 2950ac754921056793fd4e882ab118f773cbfeb8..f39a8ed17841815125760b5e67ee467978a0d6e0 100644 (file)
@@ -1820,10 +1820,10 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
         */
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
-       rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
+       rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
+                       value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
 
-       if (!rt2x00_check_rev(rt2x00dev, 0x000ffff0, 0x25730) ||
-           rt2x00_check_rev(rt2x00dev, 0x0000000f, 0)) {
+       if (!rt2x00_rt(rt2x00dev, RT2573) || (rt2x00_rev(rt2x00dev) == 0)) {
                ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
                return -ENODEV;
        }
index e783a099a8f197c2424ebf96327864f55bac89fb..b4e3ddda06cf8e8bd9d57a079f68da6452745488 100644 (file)
@@ -142,6 +142,8 @@ struct hw_pairwise_ta_entry {
  * MAC_CSR0: ASIC revision number.
  */
 #define MAC_CSR0                       0x3000
+#define MAC_CSR0_REVISION              FIELD32(0x0000000f)
+#define MAC_CSR0_CHIPSET               FIELD32(0x000ffff0)
 
 /*
  * MAC_CSR1: System control register.