arm64: dts: mediatek: add support for MT8370 SoC

Add the support of the Mediatek MT8370 SoC, a less powerful variant of
MT8390 SoC.
Their main differences are:
- Arm Cortex-A55 cores number (4 vs 6)
- Arm Cortex-A78 core speed (2.0 GHz vs 2.2 Ghz)
- Arm Mali-G57 GPU core number (2 vs 3)

Like MT8390, MT8370 hardware register maps are identical to MT8188.

Note:
The devicetree for MT8370 SoC does not currently contain the needed
overrides to support the Mali GPU integrated into this SoC. This is
scheduled to be done with a later change.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250206-dts_mt8370-genio-510-v3-2-5ca5c3257a4c@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 338120930b819645662465fa7b3c6be6491764ff..5d78f51c6183c15018986df2c76e6fdc1f9f43b4 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -492,7 +492,7 @@
                        };
 
                        cooling-maps {
-                               map0 {
+                               cpu_little0_cooling_map0: map0 {
                                        trip = <&cpu_little0_alert0>;
                                        cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
@@ -530,7 +530,7 @@
                        };
 
                        cooling-maps {
-                               map0 {
+                               cpu_little1_cooling_map0: map0 {
                                        trip = <&cpu_little1_alert0>;
                                        cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
@@ -568,7 +568,7 @@
                        };
 
                        cooling-maps {
-                               map0 {
+                               cpu_little2_cooling_map0: map0 {
                                        trip = <&cpu_little2_alert0>;
                                        cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
@@ -606,7 +606,7 @@
                        };
 
                        cooling-maps {
-                               map0 {
+                               cpu_little3_cooling_map0: map0 {
                                        trip = <&cpu_little3_alert0>;
                                        cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

diff --git a/arch/arm64/boot/dts/mediatek/mt8370.dtsi b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
new file mode 100644 (file)
index 0000000..cf1a375
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2025 Collabora Ltd.
+ * Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
+ */
+
+/dts-v1/;
+#include "mt8188.dtsi"
+
+/ {
+       compatible = "mediatek,mt8370";
+
+       cpus {
+               /delete-node/ cpu@400;
+               /delete-node/ cpu@500;
+
+               cpu-map {
+                       cluster0 {
+                               /delete-node/ core4;
+                               /delete-node/ core5;
+                       };
+               };
+       };
+};
+
+&cpu6 {
+       clock-frequency = <2200000000>;
+};
+
+&cpu7 {
+       clock-frequency = <2200000000>;
+};
+
+&cpu_little0_cooling_map0 {
+       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&cpu_little1_cooling_map0 {
+       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&cpu_little2_cooling_map0 {
+       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&cpu_little3_cooling_map0 {
+       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&ppi_cluster0 {
+       affinity = <&cpu0 &cpu1 &cpu2 &cpu3>;
+};