net: phy: nxp-c45-tja11xx: add TJA112XB SGMII PCS restart errata
authorAndrei Botila <andrei.botila@oss.nxp.com>
Tue, 4 Mar 2025 16:06:14 +0000 (18:06 +0200)
committerJakub Kicinski <kuba@kernel.org>
Sat, 8 Mar 2025 03:54:25 +0000 (19:54 -0800)
TJA1120B/TJA1121B can achieve a stable operation of SGMII after
a startup event by putting the SGMII PCS into power down mode and
restart afterwards.

It is necessary to put the SGMII PCS into power down mode and back up.

Cc: stable@vger.kernel.org
Fixes: f1fe5dff2b8a ("net: phy: nxp-c45-tja11xx: add TJA1120 support")
Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
Link: https://patch.msgid.link/20250304160619.181046-3-andrei.botila@oss.nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/phy/nxp-c45-tja11xx.c

index 709d6c9f7cbaea59c6da29d8c4308d719df94782..e9fc54517449c8ec78bdd2909fdbad551ea56885 100644 (file)
 #define MII_BASIC_CONFIG_RMII          0x5
 #define MII_BASIC_CONFIG_MII           0x4
 
+#define VEND1_SGMII_BASIC_CONTROL      0xB000
+#define SGMII_LPM                      BIT(11)
+
 #define VEND1_SYMBOL_ERROR_CNT_XTD     0x8351
 #define EXTENDED_CNT_EN                        BIT(15)
 #define VEND1_MONITOR_STATUS           0xAC80
@@ -1598,11 +1601,11 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev)
        return 0;
 }
 
-/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 */
+/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 & 3.2 */
 static void nxp_c45_tja1120_errata(struct phy_device *phydev)
 {
+       bool macsec_ability, sgmii_ability;
        int silicon_version, sample_type;
-       bool macsec_ability;
        int phy_abilities;
        int ret = 0;
 
@@ -1619,6 +1622,7 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
        phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,
                                     VEND1_PORT_ABILITIES);
        macsec_ability = !!(phy_abilities & MACSEC_ABILITY);
+       sgmii_ability = !!(phy_abilities & SGMII_ABILITY);
        if ((!macsec_ability && silicon_version == 2) ||
            (macsec_ability && silicon_version == 1)) {
                /* TJA1120/TJA1121 PHY configuration errata workaround.
@@ -1639,6 +1643,18 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
 
                phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x0);
                phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0);
+
+               if (sgmii_ability) {
+                       /* TJA1120B/TJA1121B SGMII PCS restart errata workaround.
+                        * Put SGMII PCS into power down mode and back up.
+                        */
+                       phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+                                        VEND1_SGMII_BASIC_CONTROL,
+                                        SGMII_LPM);
+                       phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+                                          VEND1_SGMII_BASIC_CONTROL,
+                                          SGMII_LPM);
+               }
        }
 }