drm/panel: s6e63m0: Fix init sequence again
authorLinus Walleij <linus.walleij@linaro.org>
Sat, 5 Dec 2020 12:22:29 +0000 (13:22 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Sat, 5 Dec 2020 23:58:45 +0000 (00:58 +0100)
The DSI version of the panel behaved instable and close
scrutiny of the vendor driver from the Samsung
GT-S8190 shows a different initialization sequence for
the DSI mode panel than the DPI mode panel.

Make the initialization depend on whether we are in
DSI or DPI mode and handle the differences.

After this the panel on the GT-I8190 becomes much more
stable.

Also spell out some more custom DCS commands found in
the vendor source code to cut down a bit on magic
where we can.

Fixes: f0aee45ffc8b ("drm/panel: s6e63m0: Fix init sequence")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20201205122229.1952980-1-linus.walleij@linaro.org
drivers/gpu/drm/panel/panel-samsung-s6e63m0.c

index 6b4e97bfd46ee01e3c0b8db6d338663af37ecc7e..bf6d704d4d272c00b333d48e43172c7b72c07694 100644 (file)
 /* Manufacturer Command Set */
 #define MCS_ELVSS_ON           0xb1
 #define MCS_TEMP_SWIRE         0xb2
+#define MCS_PENTILE_1          0xb3
+#define MCS_PENTILE_2          0xb4
+#define MCS_GAMMA_DELTA_Y_RED  0xb5
+#define MCS_GAMMA_DELTA_X_RED  0xb6
+#define MCS_GAMMA_DELTA_Y_GREEN        0xb7
+#define MCS_GAMMA_DELTA_X_GREEN        0xb8
+#define MCS_GAMMA_DELTA_Y_BLUE 0xb9
+#define MCS_GAMMA_DELTA_X_BLUE 0xba
 #define MCS_MIECTL1            0xc0
 #define MCS_BCMODE             0xc1
 #define MCS_ERROR_CHECK                0xd5
@@ -281,6 +289,7 @@ struct s6e63m0 {
        struct backlight_device *bl_dev;
        u8 lcd_type;
        u8 elvss_pulse;
+       bool dsi_mode;
 
        struct regulator_bulk_data supplies[2];
        struct gpio_desc *reset_gpio;
@@ -395,9 +404,21 @@ static int s6e63m0_check_lcd_type(struct s6e63m0 *ctx)
 
 static void s6e63m0_init(struct s6e63m0 *ctx)
 {
-       s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL,
-                                    0x01, 0x27, 0x27, 0x07, 0x07, 0x54, 0x9f,
-                                    0x63, 0x8f, 0x1a, 0x33, 0x0d, 0x00, 0x00);
+       /*
+        * We do not know why there is a difference in the DSI mode.
+        * (No datasheet.)
+        *
+        * In the vendor driver this sequence is called
+        * "SEQ_PANEL_CONDITION_SET" or "DCS_CMD_SEQ_PANEL_COND_SET".
+        */
+       if (ctx->dsi_mode)
+               s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL,
+                                            0x01, 0x2c, 0x2c, 0x07, 0x07, 0x5f, 0xb3,
+                                            0x6d, 0x97, 0x1d, 0x3a, 0x0f, 0x00, 0x00);
+       else
+               s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL,
+                                            0x01, 0x27, 0x27, 0x07, 0x07, 0x54, 0x9f,
+                                            0x63, 0x8f, 0x1a, 0x33, 0x0d, 0x00, 0x00);
 
        s6e63m0_dcs_write_seq_static(ctx, MCS_DISCTL,
                                     0x02, 0x03, 0x1c, 0x10, 0x10);
@@ -414,40 +435,40 @@ static void s6e63m0_init(struct s6e63m0 *ctx)
 
        s6e63m0_dcs_write_seq_static(ctx, MCS_SRCCTL,
                                     0x00, 0x8e, 0x07);
-       s6e63m0_dcs_write_seq_static(ctx, 0xb3, 0x6c);
+       s6e63m0_dcs_write_seq_static(ctx, MCS_PENTILE_1, 0x6c);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xb5,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_RED,
                                     0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
                                     0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
                                     0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
                                     0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
                                     0x21, 0x20, 0x1e, 0x1e);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xb6,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_RED,
                                     0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44,
                                     0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66,
                                     0x66, 0x66);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xb7,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_GREEN,
                                     0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
                                     0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
                                     0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
                                     0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
                                     0x21, 0x20, 0x1e, 0x1e);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xb8,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_GREEN,
                                     0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44,
                                     0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66,
                                     0x66, 0x66);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xb9,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_BLUE,
                                     0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
                                     0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
                                     0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
                                     0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
                                     0x21, 0x20, 0x1e, 0x1e);
 
-       s6e63m0_dcs_write_seq_static(ctx, 0xba,
+       s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_BLUE,
                                     0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44,
                                     0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66,
                                     0x66, 0x66);
@@ -704,6 +725,7 @@ int s6e63m0_probe(struct device *dev,
        if (!ctx)
                return -ENOMEM;
 
+       ctx->dsi_mode = dsi_mode;
        ctx->dcs_read = dcs_read;
        ctx->dcs_write = dcs_write;
        dev_set_drvdata(dev, ctx);