usb: typec: tcpci: use GENMASK() for TCPC_ROLE_CTRL_RP_VAL
authorAndré Draszik <andre.draszik@linaro.org>
Wed, 10 Jul 2024 10:36:12 +0000 (11:36 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 7 Aug 2024 10:49:30 +0000 (12:49 +0200)
Align the last remaining field TCPC_ROLE_CTRL_RP_VAL with the other
fields in the TCPC_ROLE_CTRL register by using GENMASK() and
FIELD_PREP().

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20240710-tcpc-cleanup-v1-5-0ec1f41f4263@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/typec/tcpm/tcpci.c
drivers/usb/typec/tcpm/tcpci_rt1711h.c
include/linux/usb/tcpci.h

index c9a7e3fcc1b7ea01091b91c597d251a684f8c38e..9477ee813fa5dfcea12046a80bc914adba9d5998 100644 (file)
@@ -114,17 +114,20 @@ static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
        case TYPEC_CC_RP_DEF:
                reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)
                       | FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)
-                      | (TCPC_ROLE_CTRL_RP_VAL_DEF << TCPC_ROLE_CTRL_RP_VAL_SHIFT));
+                      | FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                   TCPC_ROLE_CTRL_RP_VAL_DEF));
                break;
        case TYPEC_CC_RP_1_5:
                reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)
                       | FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)
-                      | (TCPC_ROLE_CTRL_RP_VAL_1_5 << TCPC_ROLE_CTRL_RP_VAL_SHIFT));
+                      | FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                   TCPC_ROLE_CTRL_RP_VAL_1_5));
                break;
        case TYPEC_CC_RP_3_0:
                reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)
                       | FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)
-                      | (TCPC_ROLE_CTRL_RP_VAL_3_0 << TCPC_ROLE_CTRL_RP_VAL_SHIFT));
+                      | FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                   TCPC_ROLE_CTRL_RP_VAL_3_0));
                break;
        case TYPEC_CC_OPEN:
        default:
@@ -194,16 +197,16 @@ static int tcpci_start_toggling(struct tcpc_dev *tcpc,
        switch (cc) {
        default:
        case TYPEC_CC_RP_DEF:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_DEF);
                break;
        case TYPEC_CC_RP_1_5:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_1_5);
                break;
        case TYPEC_CC_RP_3_0:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_3_0);
                break;
        }
 
index bdb78d08b5b53b5d7a1e55a5bdebda6de23db1dc..64f6dd0dc66096f4577cf5f6c6425da8efa0ba14 100644 (file)
@@ -232,16 +232,16 @@ static int rt1711h_start_drp_toggling(struct tcpci *tcpci,
        switch (cc) {
        default:
        case TYPEC_CC_RP_DEF:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_DEF);
                break;
        case TYPEC_CC_RP_1_5:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_1_5);
                break;
        case TYPEC_CC_RP_3_0:
-               reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
-                       TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+               reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,
+                                 TCPC_ROLE_CTRL_RP_VAL_3_0);
                break;
        }
 
index 552d074429f0db6b900f40b5495dfe5dea7632b0..80652d4f722ecc7b3f30652e86938139366c7058 100644 (file)
@@ -63,8 +63,7 @@
 
 #define TCPC_ROLE_CTRL                 0x1a
 #define TCPC_ROLE_CTRL_DRP             BIT(6)
-#define TCPC_ROLE_CTRL_RP_VAL_SHIFT    4
-#define TCPC_ROLE_CTRL_RP_VAL_MASK     0x3
+#define TCPC_ROLE_CTRL_RP_VAL          GENMASK(5, 4)
 #define TCPC_ROLE_CTRL_RP_VAL_DEF      0x0
 #define TCPC_ROLE_CTRL_RP_VAL_1_5      0x1
 #define TCPC_ROLE_CTRL_RP_VAL_3_0      0x2