drm/amdgpu/mes12: update data cache boundary

Enlarge the data cache boundary.

v2: use the fix data cache boundary.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 8ab85e6231922993a06d9d6052030fada9121366..2d713e7b976aafa2349b4a87a49aff2db3e27d2e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -685,8 +685,8 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev,
        WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,
                     upper_32_bits(adev->mes.data_fw_gpu_addr[pipe]));
 
-       /* Set 0x3FFFF (256K-1) to CP_MES_MDBOUND_LO */
-       WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x3FFFF);
+       /* Set data cache boundary CP_MES_MDBOUND_LO */
+       WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);
 
        if (prime_icache) {
                /* invalidate ICACHE */