drm/amd/display: Move REG sequence from program ogam to idle before connect
authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Wed, 3 Apr 2024 20:35:07 +0000 (14:35 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 17 Apr 2024 02:39:15 +0000 (22:39 -0400)
Fill ring buffer before offload.

Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c

index 16b5ff208d14781617c45f9d4e4628b35e823203..ea73473b970a6ecdada77082655890e2a898fc90 100644 (file)
@@ -395,9 +395,12 @@ static void mpc20_program_ogam_pwl(
                                MPCC_OGAM_LUT_DATA, rgb[i].delta_green_reg);
                REG_SET(MPCC_OGAM_LUT_DATA[mpcc_id], 0,
                                MPCC_OGAM_LUT_DATA, rgb[i].delta_blue_reg);
-
        }
 
+       REG_SEQ_SUBMIT();
+       PERF_TRACE();
+       REG_SEQ_WAIT_DONE();
+       PERF_TRACE();
 }
 
 static void apply_DEDCN20_305_wa(struct mpc *mpc, int mpcc_id,
@@ -501,11 +504,6 @@ void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id)
                ASSERT(!mpc_disabled);
                ASSERT(!mpc_idle);
        }
-
-       REG_SEQ_SUBMIT();
-       PERF_TRACE();
-       REG_SEQ_WAIT_DONE();
-       PERF_TRACE();
 }
 
 static void mpc2_init_mpcc(struct mpcc *mpcc, int mpcc_inst)