dt-bindings:iio:adc:nxp,lpc3220-adc yaml conversion
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Wed, 9 Sep 2020 17:59:36 +0000 (18:59 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Mon, 21 Sep 2020 19:01:48 +0000 (20:01 +0100)
Renamed to remove the wild cards.  These go wrong far too often so
in general preferred to use the name of a specific part.  As this
binding only provides one compatible, I went with that.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20200909175946.395313-11-jic23@kernel.org
Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt [deleted file]
Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt b/Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt
deleted file mode 100644 (file)
index 3a1bc66..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-* NXP LPC32xx SoC ADC controller
-
-Required properties:
-- compatible: must be "nxp,lpc3220-adc"
-- reg: physical base address of the controller and length of memory mapped
-  region.
-- interrupts: The ADC interrupt
-
-Optional:
- - vref-supply: The regulator supply ADC reference voltage, optional
-   for legacy reason, but highly encouraging to us in new device tree
-
-Example:
-
-       adc@40048000 {
-               compatible = "nxp,lpc3220-adc";
-               reg = <0x40048000 0x1000>;
-               interrupt-parent = <&mic>;
-               interrupts = <39 0>;
-               vref-supply = <&vcc>;
-       };
diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml
new file mode 100644 (file)
index 0000000..2c5032b
--- /dev/null
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC3220 SoC ADC controller
+
+maintainers:
+  - Gregory Clement <gregory.clement@bootlin.com>
+
+description:
+  This hardware block has been used on several LPC32XX SoCs.
+
+properties:
+  compatible:
+    const: nxp,lpc3220-adc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  vref-supply: true
+
+  "#io-channel-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc@40048000 {
+            compatible = "nxp,lpc3220-adc";
+            reg = <0x40048000 0x1000>;
+            interrupt-parent = <&mic>;
+            interrupts = <39 0>;
+            vref-supply = <&vcc>;
+        };
+    };
+...