drm/amd/display: Setup for mmhubbub3_warmup_mcif with big buffer
authorAlex Hung <alex.hung@amd.com>
Fri, 2 Jun 2023 00:22:32 +0000 (18:22 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Oct 2023 19:42:44 +0000 (15:42 -0400)
[WHY]
Hardware may require different warmup approaches - big buffer or
individual buffers.

[HOW]
Setup warmup for big buffer when it is required by specific hardware.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index 19087c4af33fd6030c8d8f8ac624d1c6aece5a10..932d56ae0af2a42a078cbc4818a6cb5eb7e6885a 100644 (file)
@@ -8883,6 +8883,7 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
                              struct drm_connector_state *new_con_state)
 {
        struct drm_writeback_connector *wb_conn = drm_connector_to_writeback(connector);
+       struct amdgpu_device *adev = dm->adev;
        struct amdgpu_crtc *acrtc;
        struct dc_writeback_info *wb_info;
        struct pipe_ctx *pipe = NULL;
@@ -8958,6 +8959,11 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
        }
 
        wb_info->mcif_buf_params.p_vmid = 1;
+       if (adev->ip_versions[DCE_HWIP][0] >= IP_VERSION(3, 0, 0)) {
+               wb_info->mcif_warmup_params.start_address.quad_part = afb->address;
+               wb_info->mcif_warmup_params.region_size =
+                       wb_info->mcif_buf_params.luma_pitch * wb_info->dwb_params.dest_height;
+       }
        wb_info->mcif_warmup_params.p_vmid = 1;
        wb_info->writeback_source_plane = pipe->plane_state;