arm64: dts: imx93-kontron: Fix SD card IO voltage control
authorFrieder Schrempf <frieder.schrempf@kontron.de>
Wed, 18 Dec 2024 15:27:31 +0000 (16:27 +0100)
committerShawn Guo <shawnguo@kernel.org>
Tue, 25 Feb 2025 00:32:56 +0000 (08:32 +0800)
The OSM-S i.MX93 SoM doesn't have the VSELECT signal of the USDHC
controller connected to the PMICs SD_VSEL input. Instead SD_VSEL
is hardwired to low level. Let the driver know this in order to
use the proper register for reading and writing the voltage level.

This fixes SD card access with the latest hardware revision of
the Kontron OSM-S i.MX93 SoM.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi

index 47c1363a2f99abe0796181d2d33e95b51ba7ee60..119a1620705967a49d09db5d2b62bf2e289850ea 100644 (file)
                                regulator-name = "NVCC_SD (LDO5)";
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <3300000>;
+                               nxp,sd-vsel-fixed-low;
                        };
                };
        };
        pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
        pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
        vmmc-supply = <&reg_usdhc2_vcc>;
+       vqmmc-supply = <&reg_nvcc_sd>;
        cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
 };
 
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1                0x40001382 /* SDIO_A_D1 */
                        MX93_PAD_SD2_DATA2__USDHC2_DATA2                0x40001382 /* SDIO_A_D2 */
                        MX93_PAD_SD2_DATA3__USDHC2_DATA3                0x40001382 /* SDIO_A_D3 */
-                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT            0x1d0
                >;
        };
 
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1                0x4000138e /* SDIO_A_D1 */
                        MX93_PAD_SD2_DATA2__USDHC2_DATA2                0x4000138e /* SDIO_A_D2 */
                        MX93_PAD_SD2_DATA3__USDHC2_DATA3                0x4000138e /* SDIO_A_D3 */
-                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT            0x1d0
                >;
        };
 
                        MX93_PAD_SD2_DATA1__USDHC2_DATA1                0x400013fe /* SDIO_A_D1 */
                        MX93_PAD_SD2_DATA2__USDHC2_DATA2                0x400013fe /* SDIO_A_D2 */
                        MX93_PAD_SD2_DATA3__USDHC2_DATA3                0x400013fe /* SDIO_A_D3 */
-                       MX93_PAD_SD2_VSELECT__USDHC2_VSELECT            0x1d0
                >;
        };