ASoC: SOF: Intel: TGL: set core_get/put ops
authorRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Fri, 19 Nov 2021 19:26:15 +0000 (21:26 +0200)
committerMark Brown <broonie@kernel.org>
Mon, 22 Nov 2021 15:40:18 +0000 (15:40 +0000)
Set core_get/put() ops for TGL. When core_get()
is requested for a core, its ref_count is incremented
and the PM_CORE_ENABLE IPC sent to the firmware to
power up the core if the current ref_count is 1.
Conversely, the ref_count is decremented in core_put()
and an IPC is sent to the DSP to power off the core
if the ref_count is 0.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20211119192621.4096077-5-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/tgl.c

index 48da8e7a67bce614a0c7f00dada35e93db0a5dbb..51011b0b8c1199b6894e0b2411505ec6ff83a74a 100644 (file)
@@ -20,6 +20,46 @@ static const struct snd_sof_debugfs_map tgl_dsp_debugfs[] = {
        {"dsp", HDA_DSP_BAR,  0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
 };
 
+static int tgl_dsp_core_get(struct snd_sof_dev *sdev, int core)
+{
+       struct sof_ipc_pm_core_config pm_core_config = {
+               .hdr = {
+                       .cmd = SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CORE_ENABLE,
+                       .size = sizeof(pm_core_config),
+               },
+               .enable_mask = sdev->enabled_cores_mask | BIT(core),
+       };
+
+       /* power up primary core if not already powered up and return */
+       if (core == SOF_DSP_PRIMARY_CORE)
+               return hda_dsp_enable_core(sdev, BIT(core));
+
+       /* notify DSP for secondary cores */
+       return sof_ipc_tx_message(sdev->ipc, pm_core_config.hdr.cmd,
+                                &pm_core_config, sizeof(pm_core_config),
+                                &pm_core_config, sizeof(pm_core_config));
+}
+
+static int tgl_dsp_core_put(struct snd_sof_dev *sdev, int core)
+{
+       struct sof_ipc_pm_core_config pm_core_config = {
+               .hdr = {
+                       .cmd = SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CORE_ENABLE,
+                       .size = sizeof(pm_core_config),
+               },
+               .enable_mask = sdev->enabled_cores_mask & ~BIT(core),
+       };
+
+       /* power down primary core and return */
+       if (core == SOF_DSP_PRIMARY_CORE)
+               return hda_dsp_core_reset_power_down(sdev, BIT(core));
+
+       /* notify DSP for secondary cores */
+       return sof_ipc_tx_message(sdev->ipc, pm_core_config.hdr.cmd,
+                                &pm_core_config, sizeof(pm_core_config),
+                                &pm_core_config, sizeof(pm_core_config));
+}
+
 /* Tigerlake ops */
 const struct snd_sof_dsp_ops sof_tgl_ops = {
        /* probe/remove/shutdown */
@@ -96,6 +136,8 @@ const struct snd_sof_dsp_ops sof_tgl_ops = {
        /* dsp core power up/down */
        .core_power_up = hda_dsp_enable_core,
        .core_power_down = hda_dsp_core_reset_power_down,
+       .core_get = tgl_dsp_core_get,
+       .core_put = tgl_dsp_core_put,
 
        /* firmware run */
        .run = hda_dsp_cl_boot_firmware_iccmax,